From: John L on 12 Mar 2007 17:45 >So what was missing in the PDP-10 architecture? Address bits, the same thing that killed every other old architecture. The DEC 20 extended addressing was a clever hack, but it was basically 286 style segmented addresses which are a nightmare to program. R's, John
From: jmfbahciv on 13 Mar 2007 08:08 In article <45f59384$1(a)darkstar>, eugene(a)cse.ucsc.edu (Eugene Miya) wrote: >In article <esp4dj$8qk_002(a)s1016.apx1.sbo.ma.dialup.rcn.com>, > <jmfbahciv(a)aol.com> wrote: >>In article <1173274591.042195.246470(a)8g2000cwh.googlegroups.com>, >> "Quadibloc" <jsavard(a)ecn.ab.ca> wrote: >>>Eugene Miya wrote: >>>> A step backward John. >>>> The high-end LISP hackers attempted a 72-bit design over 2 decades ago >>>> with the S-1 which was supposed to be DEC-10 compatible. Never finished. >>> >>>I was waiting for someone to point out that, yes, the perfect computer >>>*does* have a 36-bit word, and it is the PDP-10. > >Well if you had done homework you would have seen where the S-1 guys saw >its limitations and planned to expand for the future. > >>So what was missing in the PDP-10 architecture? > >Well as the S-1 was supposed to have 16 "Cray-1 class" CPUs, those guys >decided to have vector registers. So they thought the number crunching >was weak. And a slew of other features. Hey if you want to stay stuck >in a small address space, fine by me. Why does everybody keep assuming that PDP-10s have to be limited to 18-bit addressing? Isn't it simply a small matter of wiring to fetch more than 18bits for effective address calculations? > > >>>Of course, *my* idea is to use a 360-like instruction set, but broken >>>up into 18-bit pieces instead of 16-bit pieces. >> >>I thought your goal was to design a general purpose architecture? >>That is the only kind of architecture that can fulfill the >>stated goal in the subject header of this thread. One of >>the pluses of the PDP-10 architecture is that it was the >>perfect computer for anybody. > >Doubtful. The key word was "anybody". This meant that anybody could use the architecture and get something done. It was never meant to be a specialized architecture. TOPS-10 was described as general purpose timesharing. This implies "anybody". > >>It is against human nature laws to produce a computer that >>is perfect for everybody. > >Likely true. There is no likely about it. One man's hell is another man's paradise. > >>I think this is your tradeoff litmus test. > >Not bad. ?? /BAH
From: jmfbahciv on 13 Mar 2007 08:14 In article <et4hl0$1vlg$1(a)gal.iecc.com>, johnl(a)iecc.com (John L) wrote: >>So what was missing in the PDP-10 architecture? > >Address bits, the same thing that killed every other old architecture. Address bits with respect to what? I don't see the problem. I'm not a hardware type but a fetch for effective address calculations can be 36-bits wide. Can it not? You don't have to change current instructions. You can add, or extend, existing instructions to manipulate greater than 18-bit addresses. For example, refer to the DECsystem-10 Reference Card, part number DEC-10XSRCA-B-D. Note that the blue print indicated the KI-10 only add-ons. > >The DEC 20 extended addressing was a clever hack, but it was basically >286 style segmented addresses which are a nightmare to program. Of course it was a hack. It was a way to provide computing service until the next architecture was in production. I'm not sure that we ever expected regular users to use it. /BAH
From: krw on 13 Mar 2007 10:01 In article <et647p$8qk_016(a)s887.apx1.sbo.ma.dialup.rcn.com>, jmfbahciv(a)aol.com says... > In article <45f59384$1(a)darkstar>, eugene(a)cse.ucsc.edu (Eugene Miya) wrote: <snip> > >Well as the S-1 was supposed to have 16 "Cray-1 class" CPUs, those guys > >decided to have vector registers. So they thought the number crunching > >was weak. And a slew of other features. Hey if you want to stay stuck > >in a small address space, fine by me. > > Why does everybody keep assuming that PDP-10s have to be limited > to 18-bit addressing? Isn't it simply a small matter of wiring > to fetch more than 18bits for effective address calculations? You have to encode those bits into the ISA somehow, hopefully in a way that doesn't muck up every program ever written. <snip> -- Keith
From: Eugene Miya on 13 Mar 2007 14:13
In article <MPG.206078dd61655fc398a0f7(a)news.individual.net>, krw <krw(a)att.bizzzz> wrote: >In article <et647p$8qk_016(a)s887.apx1.sbo.ma.dialup.rcn.com>, >jmfbahciv(a)aol.com says... >> In article <45f59384$1(a)darkstar>, eugene(a)cse.ucsc.edu (Eugene Miya) wrote: >> >the S-1 ... >> >small address space, fine by me. >> >> Why does everybody keep assuming that PDP-10s have to be limited >> to 18-bit addressing? Isn't it simply a small matter of wiring >> to fetch more than 18bits for effective address calculations? > >You have to encode those bits into the ISA somehow, hopefully in a >way that doesn't muck up every program ever written. Small address space, FYI, was the DEC community's term. It didn't matter if it was 8s, 16s, 10/20s. And that was OS independent. It could have been the Franz guys complaints for LISP. Like I keep saying, we have an interesting future. -- |