The Perfect Computer - 36 bits?
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From: Rob Warnock on 9 Mar 2007 07:36 Rich Alderson <news(a)alderson.users.panix.com> wrote: +--------------- | Morten Reistad <first(a)last.name> writes: | > For a while you were very close to reinventing the PDP10. | > 36 bit string descriptors that can have any byte length from 1-18 | | If you're talking about byte pointers, the byte length legally runs | from 1-36... +--------------- Actually, Rich, if you'll think back, you'll recall that the byte length actually ran from *0* to 36! Doing an LDB of with S=0 always loaded zeros [and ILDBs never incremented], and doing a DPB with S=0 was an expensive no-op [but occasionally useful in rare corner cases!] that deposited no bits. Another common "non-intuitive" value in byte pointers [as Rich knows well -- this is for non-PDP-10 folks] was setting the byte position "within" the word (a.k.a. "P") to 36, which caused the byte pointer to refer to the non-existent byte (of width "S") just *outside* to the left of the addressed word. The usefulness of this was that an ILDB ("Increment & Load Byte") would "do the right thing", and increment into the left-most byte (of width "S") in the addressed word, and then fetch that byte. That meant that you didn't have to do any address arithmetic to turn a word address into (say) a 7-bit ASCII string byte pointer; just stuff a "P=36 S=7" into the left hand side of the address -- "HRLI AC,440700" would do it [44 octal = 36 decimal] -- and Bob's your uncle. -Rob ----- Rob Warnock <rpw3(a)rpw3.org> 627 26th Avenue <URL:http://rpw3.org/> San Mateo, CA 94403 (650)572-2607
From: Rob Warnock on 9 Mar 2007 08:18 Morten Reistad <first(a)last.name> wrote: +--------------- | move 1, @foo ; dereferences foo as a pointer. Simple? Not | quite. The indirect bit made by "@", bit 13, | is again dereferenced in foo. So if foo has | bit 13 set it will do a double dereferece, | and will check index registers as well. Ad | infinitum. It can loop easily. | | Try to pipeline that!. And this is a simplified version. | | Now, such indirections are pretty rare in most code so a pipeline | stall is feasible, at least if any multiple indirection/indexing | is happening. +--------------- Actually, the ALGOL 60 compiler on the PDP-10 [called "ALGOL-10"] deliberately used such multiple indirection/indexing for all of its multi-dimensional array-referencing operations, using "Iliffe vectors"[1] containing appropriate index register numbers & indirect bits, since that made array addressing almost trivial -- no multiply instructions (which were slow) were needed whatsoever. For, say, a three-dimensional array, if A, B, & C were already in the proper registers, then "FOO[A,B,C] := FOO[A,B,C] + 1" could be done in *one* instruction!! (No joke.) What you don't believe me? ;-} Here's the code: MOVE T1,A ; Load up the array indices MOVE T2,B MOVE T3,C AOS @FOO(T1) ; Increment FOO[A,B,C] (and don't skip). The trick is that "FOO" was actually an array of pointers with the indirect bits turned on, indexed on T2, and with the addresses of each pointing to... an array of pointers with the indirect bits turned *off*[2], indexed on T3, and with the addresses pointing to the appropriate pre-calculated [at compile-time] offsets within the "real" row-major-order array itself. -Rob [1] See <http://en.wikipedia.org/wiki/Iliffe_vector>. [2] All of the Iliffe vectors *except* the last level had the indirect bits on, but the last level had to have the indirect bits off since what they were pointing to was the data itself. ----- Rob Warnock <rpw3(a)rpw3.org> 627 26th Avenue <URL:http://rpw3.org/> San Mateo, CA 94403 (650)572-2607
From: Rich Alderson on 9 Mar 2007 16:27 "Quadibloc" <jsavard(a)ecn.ab.ca> writes: > Rich Alderson wrote: >> A *really large* PDP-10 has (note tense) 128MW (and you meant 4MW, not 4KW, >> above). That's an XKL Toad-1 with 4 32MW boards (minimal memory on system >> is 32MW). The PDP-10 did not die with DEC. > You mean a PDP-10 - compatible computer. No, I said what I meant. I worked at XKL for nearly 10 years. I know what we built. > If DEC didn't make it, it isn't a DECsystem 20. (The PDP-10 actually > died *before* DEC did. On the other hand, Hewlett-Packard is still > very much alive last time I looked.) I didn't say it was a DECSYSTEM-20 (the correct capitalization, John), I said it was a PDP-10. We licensed the entire intellectual property from Digital in 1993, in much the same way that Mentec later licensed the PDP-11 IP--in fact, the XKL contract with Digital provided the model for the Mentec IP sale. (Or do you not consider what Mentec manufactures to be PDP-11 systems?). When Digital ceased to exist as an entity, *XKL* became the owner of the PDP-10 architecture, not Compaq, and certainly not HP. Prior to the XKL product, the Foonly systems, MAXC at Xerox PARC, and the Systems Concepts systems were all referred to as PDP-10s. They didn't run different operating systems depending on who the manufacturer was, they ran DEC operating systems (or non-DEC OSes written for the architecture that also ran on PDP-10 systems from DEC). -- Rich Alderson | /"\ ASCII ribbon | news(a)alderson.users.panix.com | \ / campaign against | "You get what anybody gets. You get a lifetime." | x HTML mail and | --Death, of the Endless | / \ postings |
From: Richard Steiner on 11 Mar 2007 03:44 Here in alt.folklore.computers, "David Kanter" <dkanter(a)gmail.com> spake unto us, saying: >On Mar 5, 5:20 am, "Quadibloc" <jsav...(a)ecn.ab.ca> wrote: > >> Traditional 36-bit computers used 36-bit instruction words, fetched 36 >> bits from memory at a time, and therefore did not offer a 48-bit >> floating point type. > >How many 36 bit computers still exist? Almost every general purpose >architecture is now ~32b with 64b support as well. I'm not aware of any outside of the current Unisys Clearpath family (the OS2200 variants ["Dorado", etc.], not the MCP variants). -- -Rich Steiner >>>---> http://www.visi.com/~rsteiner >>>---> Mableton, GA USA Mainframe/Unix bit twiddler by day, OS/2+Linux+DOS hobbyist by night. WARNING: I've seen FIELDATA FORTRAN V and I know how to use it! The Theorem Theorem: If If, Then Then.
From: Eugene Miya on 12 Mar 2007 14:53
In article <esp4dj$8qk_002(a)s1016.apx1.sbo.ma.dialup.rcn.com>, <jmfbahciv(a)aol.com> wrote: >In article <1173274591.042195.246470(a)8g2000cwh.googlegroups.com>, > "Quadibloc" <jsavard(a)ecn.ab.ca> wrote: >>Eugene Miya wrote: >>> A step backward John. >>> The high-end LISP hackers attempted a 72-bit design over 2 decades ago >>> with the S-1 which was supposed to be DEC-10 compatible. Never finished. >> >>I was waiting for someone to point out that, yes, the perfect computer >>*does* have a 36-bit word, and it is the PDP-10. Well if you had done homework you would have seen where the S-1 guys saw its limitations and planned to expand for the future. >So what was missing in the PDP-10 architecture? Well as the S-1 was supposed to have 16 "Cray-1 class" CPUs, those guys decided to have vector registers. So they thought the number crunching was weak. And a slew of other features. Hey if you want to stay stuck in a small address space, fine by me. >>Of course, *my* idea is to use a 360-like instruction set, but broken >>up into 18-bit pieces instead of 16-bit pieces. > >I thought your goal was to design a general purpose architecture? >That is the only kind of architecture that can fulfill the >stated goal in the subject header of this thread. One of >the pluses of the PDP-10 architecture is that it was the >perfect computer for anybody. Doubtful. >It is against human nature laws to produce a computer that >is perfect for everybody. Likely true. >I think this is your tradeoff litmus test. Not bad. -- |