The Perfect Computer - 36 bits?
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From: Eugene Miya on 13 Mar 2007 14:21 In article <et647p$8qk_016(a)s887.apx1.sbo.ma.dialup.rcn.com>, <jmfbahciv(a)aol.com> wrote: >In article <45f59384$1(a)darkstar>, eugene(a)cse.ucsc.edu (Eugene Miya) wrote: >>In article <esp4dj$8qk_002(a)s1016.apx1.sbo.ma.dialup.rcn.com>, >> <jmfbahciv(a)aol.com> wrote: >>>In article <1173274591.042195.246470(a)8g2000cwh.googlegroups.com>, >>> "Quadibloc" <jsavard(a)ecn.ab.ca> wrote: >>>>Eugene Miya wrote: >>>>> A step backward John. >>>>> the S-1 which was supposed to be DEC-10 compatible. Never finished. >>>>I was waiting for someone to point out that, yes, the perfect computer >>>>*does* have a 36-bit word, and it is the PDP-10. >> >>>I thought your goal was to design a general purpose architecture? >>>That is the only kind of architecture that can fulfill the >>>stated goal in the subject header of this thread. One of >>>the pluses of the PDP-10 architecture is that it was the >>>perfect computer for anybody. >> >>Doubtful. > >The key word was "anybody". I knew the key word was anybody. >This meant that anybody could >use the architecture and get something done. I know you mean that and mean well, but that's not an app perspective. >It was never meant to be a specialized architecture. No one said one had to have a specialized architectures. Very few people see non-Von Neumann machines or analog machines, etc. >TOPS-10 was described >as general purpose timesharing. This implies "anybody". How long do you want to wait for solution? >>>It is against human nature laws to produce a computer that >>>is perfect for everybody. >>Likely true. > >There is no likely about it. One man's hell is another man's >paradise. While hell and paradise likely have Dantean depths, the analogy is too simple. >>>I think this is your tradeoff litmus test. >>Not bad. > >?? Means that I think you are likely in the right directions (maybe a quadrant) but too binary. Better papers that litmus exist if you insist on a chemistry analogy. So I reserve judgment on your fuller analogy on nature's laws. --
From: Rich Alderson on 13 Mar 2007 15:33 jmfbahciv(a)aol.com writes: > In article <et4hl0$1vlg$1(a)gal.iecc.com>, johnl(a)iecc.com (John L) wrote: >>> So what was missing in the PDP-10 architecture? >> Address bits, the same thing that killed every other old architecture. > Address bits with respect to what? I don't see the problem. > I'm not a hardware type but a fetch for effective address > calculations can be 36-bits wide. Can it not? No, it cannot. The largest offset from an index base (the only way to go beyond 18 bits of address) is 2^18, and there's no way to get around that. And there's only one of those per instruction, for most classes of instruction. > You don't have to change current instructions. You can > add, or extend, existing instructions to manipulate greater > than 18-bit addresses. > For example, refer to the DECsystem-10 Reference Card, part number > DEC-10XSRCA-B-D. Note that the blue print indicated the KI-10 > only add-ons. >> The DEC 20 extended addressing was a clever hack, but it was basically >> 286 style segmented addresses which are a nightmare to program. > Of course it was a hack. It was a way to provide computing service > until the next architecture was in production. > I'm not sure that we ever expected regular users to use it. Since it is the only way to get a program with large data structures to fit in more than 256KW of memory, and since large data structures are required for a number of modern applications, regular users *have* to use it if thye are going to program those applications on the PDP-10 architecture. -- Rich Alderson | /"\ ASCII ribbon | news(a)alderson.users.panix.com | \ / campaign against | "You get what anybody gets. You get a lifetime." | x HTML mail and | --Death, of the Endless | / \ postings |
From: Peter Flass on 13 Mar 2007 19:16 jmfbahciv(a)aol.com wrote: > In article <et4hl0$1vlg$1(a)gal.iecc.com>, johnl(a)iecc.com (John L) wrote: > >>>So what was missing in the PDP-10 architecture? >> >>Address bits, the same thing that killed every other old architecture. > > > Address bits with respect to what? I don't see the problem. > I'm not a hardware type but a fetch for effective address > calculations can be 36-bits wide. Can it not? > You don't have to change current instructions. You can > add, or extend, existing instructions to manipulate greater > than 18-bit addresses. If I'm doing the math right, this is 64 Giga-*Words*, or 256 Gigabytes assuming you pick 9-bit bytes. Should be enough. If you need more, change the page-table format (paging makes it a -20, right?) One adress space could still only map 64GW, but you could have lots of address spaces.
From: krw on 13 Mar 2007 19:26 In article <45f6db9c$1(a)darkstar>, eugene(a)cse.ucsc.edu says... > In article <MPG.206078dd61655fc398a0f7(a)news.individual.net>, > krw <krw(a)att.bizzzz> wrote: > >In article <et647p$8qk_016(a)s887.apx1.sbo.ma.dialup.rcn.com>, > >jmfbahciv(a)aol.com says... > >> In article <45f59384$1(a)darkstar>, eugene(a)cse.ucsc.edu (Eugene Miya) wrote: > >> >the S-1 ... > >> >small address space, fine by me. > >> > >> Why does everybody keep assuming that PDP-10s have to be limited > >> to 18-bit addressing? Isn't it simply a small matter of wiring > >> to fetch more than 18bits for effective address calculations? > > > >You have to encode those bits into the ISA somehow, hopefully in a > >way that doesn't muck up every program ever written. > > Small address space, FYI, was the DEC community's term. > It didn't matter if it was 8s, 16s, 10/20s. > And that was OS independent. It could have been the Franz guys > complaints for LISP. Ok, I'm more than confused. "OS independent"? PDP8s? 8bit? 16bit? DEC10/20s? > Like I keep saying, we have an interesting future. Sounds like an interesting past too. ;-) -- Keith
From: jmfbahciv on 14 Mar 2007 07:19
In article <MPG.206078dd61655fc398a0f7(a)news.individual.net>, krw <krw(a)att.bizzzz> wrote: >In article <et647p$8qk_016(a)s887.apx1.sbo.ma.dialup.rcn.com>, >jmfbahciv(a)aol.com says... >> In article <45f59384$1(a)darkstar>, eugene(a)cse.ucsc.edu (Eugene Miya) wrote: > ><snip> > >> >Well as the S-1 was supposed to have 16 "Cray-1 class" CPUs, those guys >> >decided to have vector registers. So they thought the number crunching >> >was weak. And a slew of other features. Hey if you want to stay stuck >> >in a small address space, fine by me. >> >> Why does everybody keep assuming that PDP-10s have to be limited >> to 18-bit addressing? Isn't it simply a small matter of wiring >> to fetch more than 18bits for effective address calculations? > >You have to encode those bits into the ISA somehow, hopefully in a >way that doesn't muck up every program ever written. Which bits? The indirect bit? /BAH |