Virtex 4 ICAP partial reconfiguration
in [FPGA]
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From: Andrea Miele on 26 Apr 2010 08:17 I have built a design with PR flow 9.2 using bus macros. The dynamic reconfiguration works using Impact and downloading the partial bistreams. I have connected the Virtex 4 ICAP port to the LEON3 processor through the AMBA APB bus. I would like to perform partial reconfiguration through ICAP. I have a C software running on LEON 3 wich writes the partial bistream onto ICAP. The partial bitstream file has been trimmed in order to start with the FFFFFFFF dword (the header has been cut off) and included in the executable as a integer array. The software write all the dwords of the bitstream on the ICAP, but the virtex 4 seems to be not reconfigured as it happens with Impact. What is wrong? Andrea
From: Sean Durkin on 26 Apr 2010 08:33 Andrea Miele wrote: > The software write all the dwords of the bitstream on the ICAP, but > the virtex 4 seems to be not reconfigured as it happens > with Impact. > What is wrong? Do you send some more empty data words (I think that's 0x20202020 or something like that, can't remember) after the actual bitstream? At least when you configure the entire FPGA via SelectMAP or the serial interface you always have to give the configuration state machine a few additional clock cycles after clocking in all of the configuration data, or it won't complete. HTH, Sean -- Replace "MONTH" with the three-letter abbreviation of the current month and the two-digit code for the current year (simple, eh?).
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