Xilinx MIG v2.3 Spartan3A-DSP DDR2 Interface
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From: Berk on 26 Apr 2010 09:17 Hey everyone, I have been struggling to use the MIG to generate a memory interface to the DDR2 device. First some background info: I am using the Xilinx® Spartan®-3A DSP XtremeDSP Starter Platform. I am using ISE 10.1 with MIG v2.3. I have created the MIG from GUI and played around with it. I also edited the UCF file (just changed the locations basically, did not mess around with timings). I cannot do any simulation because I am using Windows 7 and apparently, simulation doesn't work (or maybe some other problem). Anyway, the thing is I can download the code to the device and I can see all the signals go up and down in correct times. (like init_done, user_cmd_ack, user_data_valid etc.) Then I try to write some data to the memory, I can see user_cmd_ack go high, then I assert burst_done, then I can see user_cmd_ack go low. (which means write is succesful, right?) However, whenever I try to 'read' from the memory, I always get x"00000000" no matter what the address is. What can be wrong with it? Thanks for the help.
From: Gabor on 26 Apr 2010 09:39 On Apr 26, 9:17 am, Berk <berkgura...(a)gmail.com> wrote: > Hey everyone, > > I have been struggling to use the MIG to generate a memory interface > to the DDR2 device. First some background info: I am using the Xilinx® > Spartan®-3A DSP XtremeDSP Starter Platform. I am using ISE 10.1 with > MIG v2.3. > > I have created the MIG from GUI and played around with it. I also > edited the UCF file (just changed the locations basically, did not > mess around with timings). I cannot do any simulation because I am > using Windows 7 and apparently, simulation doesn't work (or maybe some > other problem). > > Anyway, the thing is I can download the code to the device and I can > see all the signals go up and down in correct times. (like init_done, > user_cmd_ack, user_data_valid etc.) Then I try to write some data to > the memory, I can see user_cmd_ack go high, then I assert burst_done, > then I can see user_cmd_ack go low. (which means write is succesful, > right?) However, whenever I try to 'read' from the memory, I always > get x"00000000" no matter what the address is. What can be wrong with > it? > > Thanks for the help. DDR2 timing is not easy to meet in the Spartan parts, so you really can't just muck around with the pinouts. If you changed the location of any memory pins you need to re-run the MIG configuration GUI and use the option to "Verify UCF". This tells MIG to generate new timing and directed routing constraints based on the pin locations from your actual design. By the way I thought that the Starter boards come with a pre-built version of the MIG design. Have you looked into that? Regards, Gabor
From: Berk on 26 Apr 2010 10:10 On 26 Nisan, 16:39, Gabor <ga...(a)alacron.com> wrote: > On Apr 26, 9:17 am, Berk <berkgura...(a)gmail.com> wrote: > > > > > > > Hey everyone, > > > I have been struggling to use the MIG to generate a memory interface > > to the DDR2 device. First some background info: I am using the Xilinx® > > Spartan®-3A DSP XtremeDSP Starter Platform. I am using ISE 10.1 with > > MIG v2.3. > > > I have created the MIG from GUI and played around with it. I also > > edited the UCF file (just changed the locations basically, did not > > mess around with timings). I cannot do any simulation because I am > > using Windows 7 and apparently, simulation doesn't work (or maybe some > > other problem). > > > Anyway, the thing is I can download the code to the device and I can > > see all the signals go up and down in correct times. (like init_done, > > user_cmd_ack, user_data_valid etc.) Then I try to write some data to > > the memory, I can see user_cmd_ack go high, then I assert burst_done, > > then I can see user_cmd_ack go low. (which means write is succesful, > > right?) However, whenever I try to 'read' from the memory, I always > > get x"00000000" no matter what the address is. What can be wrong with > > it? > > > Thanks for the help. Hello, > DDR2 timing is not easy to meet in the Spartan parts, so you really > can't just muck around with the pinouts. If you changed the location > of any memory pins you need to re-run the MIG configuration GUI and > use the option to "Verify UCF". This tells MIG to generate new > timing and directed routing constraints based on the pin locations > from your actual design. Actually, I did just that. First, I let MIG create a 'wrong' UCF file. Then I changed the pinouts correctly. Then I selected "Update Design" and pointed it to my newly edited UCF file. Then, it changed the pinouts and timings. But there is no change in the output. By the way I am changing the UCF file under the user_design folder. I think this is correct. How can I verify if I'm having a UCF error or something else? > By the way I thought that the Starter boards come with a pre-built > version of the MIG design. Have you looked into that? > Regards, > Gabor Yeah, I did that but my Starter board is not supported. Thanks a lot.
From: Gabor on 26 Apr 2010 13:20 On Apr 26, 10:10 am, Berk <berkgura...(a)gmail.com> wrote: > On 26 Nisan, 16:39, Gabor <ga...(a)alacron.com> wrote: > > > > > On Apr 26, 9:17 am, Berk <berkgura...(a)gmail.com> wrote: > > > > Hey everyone, > > > > I have been struggling to use the MIG to generate a memory interface > > > to the DDR2 device. First some background info: I am using the Xilinx® > > > Spartan®-3A DSP XtremeDSP Starter Platform. I am using ISE 10.1 with > > > MIG v2.3. > > > > I have created the MIG from GUI and played around with it. I also > > > edited the UCF file (just changed the locations basically, did not > > > mess around with timings). I cannot do any simulation because I am > > > using Windows 7 and apparently, simulation doesn't work (or maybe some > > > other problem). > > > > Anyway, the thing is I can download the code to the device and I can > > > see all the signals go up and down in correct times. (like init_done, > > > user_cmd_ack, user_data_valid etc.) Then I try to write some data to > > > the memory, I can see user_cmd_ack go high, then I assert burst_done, > > > then I can see user_cmd_ack go low. (which means write is succesful, > > > right?) However, whenever I try to 'read' from the memory, I always > > > get x"00000000" no matter what the address is. What can be wrong with > > > it? > > > > Thanks for the help. > > Hello, > > > DDR2 timing is not easy to meet in the Spartan parts, so you really > > can't just muck around with the pinouts. If you changed the location > > of any memory pins you need to re-run the MIG configuration GUI and > > use the option to "Verify UCF". This tells MIG to generate new > > timing and directed routing constraints based on the pin locations > > from your actual design. > > Actually, I did just that. First, I let MIG create a 'wrong' UCF file. > Then I changed the pinouts correctly. Then I > selected "Update Design" and pointed it to my newly edited UCF file. > Then, it changed the pinouts and timings. > But there is no change in the output. By the way I am changing the UCF > file under the user_design folder. I think > this is correct. How can I verify if I'm having a UCF error or > something else? > > > By the way I thought that the Starter boards come with a pre-built > > version of the MIG design. Have you looked into that? > > Regards, > > Gabor > > Yeah, I did that but my Starter board is not supported. > > Thanks a lot. Well the obvious thing you can do is check the pad report to make sure the correct pinout is in use. You can also go into the FPGA editor and check that your MIG-related pins have all the appropriate registers in the IOB tiles. Then there's the obvious stuff like checking your clock and reset inputs to be sure they're hooked up properly. I've often started going down a head-scratching path with DDR designs only to find that the active-low reset input was connected to an active high reset signal, or that the DCM was being reset be a register clocked on its own output (this doesn't work with DCM's because the CLK0 output shuts off when reset is active). HTH, Gabor
From: RCIngham on 27 Apr 2010 05:08
>On Apr 26, 10:10=A0am, Berk <berkgura...(a)gmail.com> wrote: >> On 26 Nisan, 16:39, Gabor <ga...(a)alacron.com> wrote: >> >> >> >> > On Apr 26, 9:17=A0am, Berk <berkgura...(a)gmail.com> wrote: >> >> > > Hey everyone, >> >> > > I have been struggling to use the MIG to generate a memory interface >> > > to the DDR2 device. First some background info: I am using the Xilinx= >=AE >> > > Spartan=AE-3A DSP XtremeDSP=99 Starter Platform. I am using ISE 10.1 = >with >> > > MIG v2.3. >> >> > > I have created the MIG from GUI and played around with it. I also >> > > edited the UCF file (just changed the locations basically, did not >> > > mess around with timings). I cannot do any simulation because I am >> > > using Windows 7 and apparently, simulation doesn't work (or maybe some >> > > other problem). There is another thread about that, see: http://www.fpgarelated.com/usenet/fpga/show/92403-1.php >> >> > > Anyway, the thing is I can download the code to the device and I can >> > > see all the signals go up and down in correct times. (like init_done, >> > > user_cmd_ack, user_data_valid etc.) Then I try to write some data to >> > > the memory, I can see user_cmd_ack go high, then I assert burst_done, >> > > then I can see user_cmd_ack go low. (which means write is succesful, >> > > right?) However, whenever I try to 'read' from the memory, I always >> > > get x"00000000" no matter what the address is. What can be wrong with >> > > it? >> >> > > Thanks for the help. >> >> Hello, >> >> > DDR2 timing is not easy to meet in the Spartan parts, so you really >> > can't just muck around with the pinouts. =A0If you changed the location >> > of any memory pins you need to re-run the MIG configuration GUI and >> > use the option to "Verify UCF". =A0This tells MIG to generate new >> > timing and directed routing constraints based on the pin locations >> > from your actual design. >> >> Actually, I did just that. First, I let MIG create a 'wrong' UCF file. >> Then I changed the pinouts correctly. Then I >> selected "Update Design" and pointed it to my newly edited UCF file. >> Then, it changed the pinouts and timings. >> But there is no change in the output. By the way I am changing the UCF >> file under the user_design folder. I think >> this is correct. How can I verify if I'm having a UCF error or >> something else? >> >> > By the way I thought that the Starter boards come with a pre-built >> > version of the MIG design. =A0Have you looked into that? >> > Regards, >> > Gabor >> >> Yeah, I did that but my Starter board is not supported. >> >> Thanks a lot. > >Well the obvious thing you can do is check the pad report >to make sure the correct pinout is in use. You can also go >into the FPGA editor and check that your MIG-related pins >have all the appropriate registers in the IOB tiles. > >Then there's the obvious stuff like checking your clock >and reset inputs to be sure they're hooked up properly. >I've often started going down a head-scratching path >with DDR designs only to find that the active-low >reset input was connected to an active high reset signal, >or that the DCM was being reset be a register clocked >on its own output (this doesn't work with DCM's because >the CLK0 output shuts off when reset is active). > >HTH, >Gabor > Which is why I have found simulation to be so useful. But beware the odd case when the simulation model doesn't match the synthesised behaviour! In my experience, MiG 2.3 DDR2 controllers seem to be ok for Virtex-4. --------------------------------------- Posted through http://www.FPGARelated.com |