Prev: Uart problem, xapp223 + Spartan3A
Next: Convert Schematic Files (.sch) to Verilog Files (.v) for simulationin ModelSim
From: Jim Granville on 6 Jul 2007 18:54
steve.lass(a)xilinx.com wrote:
> Laurent Pinchart" <laurent.pinchart(a)skynet.be> wrote in message
> news:468e1bce$0$13850$ba620e4c(a)news.skynet.be...
>
>
>>I've had some contacts with Xilinx a few months ago regarding the Xilinx
>>Platform Cable USB and the horrible Windriver they use. I pointed out that
>>there are clean, free and open-source solutions to interface USB devices
>>from userspace that would solve many user issues with Windriver (not even
>>talking about the numerous security holes). People listened, developers
>>didn't act. A piece of the chain is probably broken in the middle. As long
>>as companies will refuse offers such as "I can make your software work
>>better, here's how, and I'm willing to spend time on this to help you for
>>free", we won't get decent softwares.
>
>
> We listened. The open source cable drivers are in alpha in 9.2.01i and
> are being made available to select customers for evaluation.
>
> Steve

Well done :)

-jg

From: MM on 6 Jul 2007 19:50
<steve.lass(a)xilinx.com> wrote in message news:f6lscf$cvr1(a)cnn.xilinx.com...
> Laurent Pinchart" <laurent.pinchart(a)skynet.be> wrote in message
> We listened. The open source cable drivers are in alpha in 9.2.01i and
> are being made available to select customers for evaluation.
>

Way to go Xilinx !!!! How about other software issues ? :)

/Mikhail


From: pbFJKD on 7 Jul 2007 11:14
steve.lass(a)xilinx.com wrote:
>Laurent Pinchart" <laurent.pinchart(a)skynet.be> wrote in message
>news:468e1bce$0$13850$ba620e4c(a)news.skynet.be...

>> I've had some contacts with Xilinx a few months ago regarding the Xilinx
>> Platform Cable USB and the horrible Windriver they use. I pointed out that
>> there are clean, free and open-source solutions to interface USB devices
>> from userspace that would solve many user issues with Windriver (not even
>> talking about the numerous security holes). People listened, developers
>> didn't act. A piece of the chain is probably broken in the middle. As long
>> as companies will refuse offers such as "I can make your software work
>> better, here's how, and I'm willing to spend time on this to help you for
>> free", we won't get decent softwares.

>We listened. The open source cable drivers are in alpha in 9.2.01i and
>are being made available to select customers for evaluation.

Good initiative. What's the public release date?

From: Laurent Pinchart on 7 Jul 2007 14:51
Hi Steve,

steve.lass(a)xilinx.com wrote:

> Laurent Pinchart" <laurent.pinchart(a)skynet.be> wrote in message
> news:468e1bce$0$13850$ba620e4c(a)news.skynet.be...
>
>> I've had some contacts with Xilinx a few months ago regarding the Xilinx
>> Platform Cable USB and the horrible Windriver they use. I pointed out
>> that there are clean, free and open-source solutions to interface USB
>> devices from userspace that would solve many user issues with Windriver
>> (not even talking about the numerous security holes). People listened,
>> developers didn't act. A piece of the chain is probably broken in the
>> middle. As long as companies will refuse offers such as "I can make your
>> software work better, here's how, and I'm willing to spend time on this
>> to help you for free", we won't get decent softwares.
>
> We listened. The open source cable drivers are in alpha in 9.2.01i and
> are being made available to select customers for evaluation.

thanks for the good news. Sorry for the rant but I hadn't heard from Xilinx
for quite some time, and I thought the issue had just been forgotten.

Laurent Pinchart

From: Ken Ryan on 12 Jul 2007 23:28
PFC wrote:
> I'd be willing to relearn the Altera tools if someone can confirm
> that you can get the full package for a decent price (ie the same or
> cheaper than EDK) ; full package meaning full license to use Nios (not
> time-limited or whatever), JTAG cpu debugging plus having a good core
> library. Cuz I saw nice board modules with Altera chips on them...

I did about half a project using Quartus/SOPC Builder 6. Quartus was
fine. SOPC Builder was one of the worst bug-ridden programs I've ever
seen. Moving to EDK was a major breath of fresh air. I haven't tried
version 7, so for all I know everything got fixed.

Nice part about the Altera is you get more useful stuff for your money.
Xilinx seems to nickel-and-dime you with their IP offerings (a decent
UART, I2C, etc.). Very few of their example designs can even be
implemented without spending many $K for IP cores (I don't count
the evaluation time-bombs as "implementing"). Altera seems to include
a much richer set of peripherals in the base package.

ken
First  |  Prev  |  Next  |  Last
Pages: 1 2 3 4
Prev: Uart problem, xapp223 + Spartan3A
Next: Convert Schematic Files (.sch) to Verilog Files (.v) for simulationin ModelSim