Xilinx Legal
in [FPGA]
|
From: cs_posting on 31 Jan 2006 10:44 Kolja Sulimma wrote: > The ISE toolflow uses TCL at some points. If the use of a tool alone > would impose the license of the tool on the result all bitstreams would > be GPL. So Xilinx needs to explain why the EULA of ISE does affect the > bitstream while the license of TCL does not. Does the license of TCL make claims about the output of TCL-using tools? My guess is it doesn't. So that's a difference right there - it doesn't really give us any clues about the potential validity of making such a claim.
From: fpga_toys on 31 Jan 2006 10:46 Kolja Sulimma wrote: > BTW: > The ISE toolflow uses TCL at some points. If the use of a tool alone > would impose the license of the tool on the result all bitstreams would > be GPL. So Xilinx needs to explain why the EULA of ISE does affect the > bitstream while the license of TCL does not. Hey Guys, let's back off and let the open source advocates inside Xilinx to have time to work out how they want to be the good guys. They clearly recieve a lot of value from free open source that they use internally and put into their product. The backlash could clearly be creating XGPL licenses, which allow use for all but those companies that refuse to be equally open with their EULA's. That would a a lively debate, but we see it already with the number of free software licenses which specifically prohibt commercial use because of these abuses, and the mindset that if someone is going to profit from their work, they want part of the pie in the form of royalties or license fees. The reality is that all the information open source needs is out of their control anyway, it would just take a legal battle to secure it, that maybe even FSF would fund. I've already documented that fact. So, let's just give Xilinx a chance to think about this more carefully, and have a chance to volunteer to be good open source citizens.
From: Ed McGettigan on 31 Jan 2006 11:23 Kolja Sulimma wrote: > Ed McGettigan schrieb: > >> The (A) company used these exact same EULA restrictions against Clear Logic >> and won. >> >> More details here: >> http://www.internetcases.com/archives/2005/09/ninth_circuit_a_1.html > > There is no mentioning of the EULA. Apparently there is a special law in > the US to protect semiconductor masks and the court treated the > bitstream as a mask work. > The EULA can still be completely invalid. > > I just skimmed the law, and I still do not see how Altera could possibly > have won. > It says > > "the ?owner? of a mask work is the person who created the mask work" > If I start bitgen, I am generating the mask work and not altera. I use a > tool to do it, yes, but surely I am still the creator? > > But even if Altera was the owner, it goes on: > "the protection provided for a mask work under this chapter shall > commence on the date on which the mask work is registered under section > 908, or the date on which the mask work is first commercially exploited > anywhere in the world" > Surely Altera did not register my bitstream and did not exploit it > comercially before I sent it to Clear Logic? > > Then the law goes on, and explicitely allows to reverse engineer the > mask (bitstream) to create your own bitstreams with the information > obtained: > > ?906 (a) 1 and 2: "it is not an infringement [...] for [...] a person > who performs the analysis or evaluation described in paragraph (1) to > incorporate the results of such conduct in an original mask work which > is made to be distributed." > > > I conclude that ?906 (a) of the Semiconductor Chip Protection Act of > 1994 permits to reverse engineer bitstream information to create open > source tools. But hey, IANAL. > > Kolja Sulimma > > The previous link that I cited only discussed a narrow issue that was raised to an appellate court. Try this one instead which has notes on the on the Software License Agreement. Altera was not claiming that they "owned" the bitstream only that use of the bitstream was restricted to Altera only devices by the license of the software that created it. http://www.iplawobserver.com/2005/09/using-softwares-output-to-copy-chips.html Ed
From: DJ Delorie on 31 Jan 2006 11:35 [disclaimer: I'm a GCC developer and former Cygwin developer] One key difference between Cygwin and Xilinx, is that apps built with Cygwin also *include* part of cygwin (almost verbatim) in the resulting binary. Do bitstreams built by Xilinx tools *include* portions of the Xilinx tools in the resulting bitstream? Can Xilinx point to a bitstream and say "these 1000 bits are copied from our library" ? A better comparison is comparing Xilinx to GCC. The GCC license explicitly states that binaries built *with* GCC are not affected in any way by GCC's license. Note that binaries built *from* GCC (derived works) are a different story. GCC's runtime libraries have a specific clause that covers linking; if you build with GCC, linking doesn't incur the GPL. If you build with something else, linking does incur the GPL.
From: Kolja Sulimma on 31 Jan 2006 11:58
Ed McGettigan schrieb: > The previous link that I cited only discussed a narrow issue that > was raised to an appellate court. Try this one instead which has > notes on the on the Software License Agreement. Altera was not > claiming that they "owned" the bitstream only that use of the > bitstream was restricted to Altera only devices by the license of > the software that created it. > > http://www.iplawobserver.com/2005/09/using-softwares-output-to-copy-chips.html Interesting. They invoke the Semiconductor Chip Protection Act by stating that the bitstream format contains information on the structure of alteras FPGA circuits and that it therefore something like a copy of alteras circuit layout was created. Clear Logic seems to believe that the jury was confused about what exactly was copied. I think that is very likely. You are allowed to reverse engineer if you incorporate the results in an original work. As I understand it clear logics mask is very different from alteras in that there is no configuration logic, sram cells, etc. There should be less then 1/6 of the transistors. Of course the structure will be similar, but what else should "incorporate the results" mean, clearly similarities are allowed? Still, that ruling does not apply to using an altera bitstream in a Xilinx FPGA oder implementing an altera bitstream in an ASIC (that is not similar to alteras FPGA structure) Kolja Sulimma |