Prev: domain crossing and clock synchronisation for a high frequency timer
Next: Does Xilinx sync FIFO use dual port memory? Does this affect resource?
From: edoardo on 3 Dec 2009 07:48 Hi all, I'm developing an FPGA (V5SXT50) containing a microblaze core. I have a problem that I do not understand how to find a solution. If I set the Software Platform Setting to use a standalone OS, all seems to work fine. The test applications (memory test, peripherals test ...) do not give me any errors. If I set Software Platform Setting to use a Xilkernel OS, then the memory test passes but the interrupt test doesn't pass. Seems that the microblaze doesn't see the interrupt generated by the timer. This is confirmed also by another problem I had when executing my final application, because I see that the thread are not switched and the application remains in the idle_task. Into the software platform settings I have correctly assigned the interrupt and timer resource. I'm using Xilinx EDK 10.1 SP3. Can anyone help me ? Thanks, Edoardo. |