another board
in [Design]
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From: Tim Williams on 16 Oct 2009 23:20 On Oct 16, 7:48 pm, John Larkin <jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: > ftp://jjlarkin.lmi.net/Board39.jpg Gee, lots of wasted space, and it looks like only two layers for the most part (the tan colored area). I'd guess that board could be about half size if you wanted to? Tim
From: John Larkin on 16 Oct 2009 23:36 On Fri, 16 Oct 2009 18:39:14 -0700, Joerg <invalid(a)invalid.invalid> wrote: >John Larkin wrote: >> On Fri, 16 Oct 2009 18:57:05 -0600, don <don> wrote: >> >>> John Larkin wrote: >>>> ftp://jjlarkin.lmi.net/Board39.jpg >>>> >>>> This is an 8-layer mixed-signal thing. On the left is a PCIe interface >>>> to a Kontron mini-ITX sbc. >>>> >>>> Upper-right is a cluster of five spread-spectrum switching regulators, >>>> all inductor isolated from everything coming and going. I may slice >>>> some ground planes around there just to terrify Joerg. >>>> >>>> The brown pour is where the pipeline ADC is, differential fed from the >>>> two SMB connectors to its right. >>>> >>>> This also has a couple of 128 Ms/s arbs and tons of various digital >>>> i/o things and some DDR2 dram to feed the arbs, and a programmable >>>> microengine to fire shots. The FPGA is a Spartan 6/45, which we >>>> actually have now. >>>> >>>> The Brat did the layout; not bad for a psychology/softball/beer pong >>>> major. >>>> >>>> John >>>> >>> Which CAD program did he use ?? >>> >>> don >> >> She. Boys don't play softball in college. It's PADS, version 5. >> > >Do you think she'll take over the biz some day when you decide to retire? I don't think I'll _decide_ to retire. But I offered it to her and she thought about it for about 19 milliseconds and said yes. I have a technical guy I might involve, too. All I want is a desk and a workbench over in the corner, and a lucrative buyout contract. John
From: John Larkin on 16 Oct 2009 23:44 On Fri, 16 Oct 2009 19:13:18 -0700 (PDT), a7yvm109gf5d1(a)netzero.com wrote: >On Oct 16, 7:48 pm, John Larkin ><jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: >> ftp://jjlarkin.lmi.net/Board39.jpg >> >> This is an 8-layer mixed-signal thing. On the left is a PCIe interface >> to a Kontron mini-ITX sbc. >> >> Upper-right is a cluster of five spread-spectrum switching regulators, >> all inductor isolated from everything coming and going. I may slice >> some ground planes around there just to terrify Joerg. >> >> The brown pour is where the pipeline ADC is, differential fed from the >> two SMB connectors to its right. >> >> This also has a couple of 128 Ms/s arbs and tons of various digital >> i/o things and some DDR2 dram to feed the arbs, and a programmable >> microengine to fire shots. The FPGA is a Spartan 6/45, which we >> actually have now. >> >> The Brat did the layout; not bad for a psychology/softball/beer pong >> major. >> >> John > >Sweet, do you use Hyperlynx or whatever it's called to simulate >voltage drops on planes? The plane DC drops are small and don't matter. I do need to keep AC ground loops out of the ADC section. I used TXline and Appcad to calculate trace impedances. The PCIexpress signal pairs need to be exact differential impedances and matched lengths, and PADS reports the routed lengths. I tweaked the more critical high-speed stuff, clock traces, impedances, bypassing, stuff like that, myself. It's hard to explain that part to a layout person, especially when it's half instinct anyhow. John
From: John Larkin on 16 Oct 2009 23:49 On Fri, 16 Oct 2009 20:20:18 -0700 (PDT), Tim Williams <tmoranwms(a)gmail.com> wrote: >On Oct 16, 7:48�pm, John Larkin ><jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: >> ftp://jjlarkin.lmi.net/Board39.jpg > >Gee, lots of wasted space, and it looks like only two layers for the >most part (the tan colored area). I'd guess that board could be about >half size if you wanted to? > >Tim It could be smaller, but it's sort of connector dominated. It's 8 layers: four routing, one ground, three power plane layers. The horrible part is getting in/out of the FPGA; everything converges there. It doesn't show, but the left side of the board is very trace+via dense on all layers. I like PCB layout; it's sort of a video game. John
From: Jan Panteltje on 17 Oct 2009 07:15
On a sunny day (Fri, 16 Oct 2009 17:48:23 -0700) it happened John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote in <o64id55qciubeulpeqepl0ci85ed1hebs5(a)4ax.com>: > >ftp://jjlarkin.lmi.net/Board39.jpg > >This is an 8-layer mixed-signal thing. On the left is a PCIe interface >to a Kontron mini-ITX sbc. > >Upper-right is a cluster of five spread-spectrum switching regulators, >all inductor isolated from everything coming and going. I may slice >some ground planes around there just to terrify Joerg. > >The brown pour is where the pipeline ADC is, differential fed from the >two SMB connectors to its right. > >This also has a couple of 128 Ms/s arbs and tons of various digital >i/o things and some DDR2 dram to feed the arbs, and a programmable >microengine to fire shots. The FPGA is a Spartan 6/45, which we >actually have now. > >The Brat did the layout; not bad for a psychology/softball/beer pong >major. > >John Yea, but does it work? |