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From: max on 11 Oct 2009 09:41
Hi,

I'm using the ML403 board for the interrupt-based system. In this system,
floating point operations in interrupt handler are required and APU is
employed to accelerate the single precision floating point operation. The
software is running with the standalone BSP on the PPC. The snippet is
shown below:

// global variables
static float a=1.0F;
static float b=2.0F;

void TimerCounterHandler(void *CallBackRef, Xuint8 TmrCtrNumber)
{
a += b;
}


It seems that PPC is blocked when timer interrupt handler
“TimerCounterHandler” is executed. Any advice on how to resolve the
problem.

Best Regards,
Max


From: Ben Jones on 12 Oct 2009 04:56
On Oct 11, 2:41 pm, "max" <ch...(a)e-chaos.com> wrote:
> Hi,
>
> I'm using the ML403 board for the interrupt-based system. In this system,
> floating point operations in interrupt handler are required and APU is
> employed to accelerate the single precision floating point operation. The
> software is running with the standalone BSP on the PPC.
> ...
> It seems that PPC is blocked when timer interrupt handler
> “TimerCounterHandler” is executed. Any advice on how to resolve the
> problem.

When the PowerPC enters an interrupt handler, the MSR is altered in a
number of ways. One of those ways is that MSR[FP] is set to zero. This
means that, by default, you cannot use floating-point instructions
within an interrupt handler. To do so, you would have to re-enable the
FPU by writing a 1 to MSR[FP] at the start of your ISR.

If in your C code you #include "xpseudo_asm.h" from the PowerPC405
driver, then you should be able to write something like

mtmsr(mfmsr() | XREG_MSR_FLOATING_POINT_AVAILABLE);

There is another MSR bit defined by Xilinx which you might have to
modify, which is bit 6 (XREG_MSR_APU_AVAILABLE). I can't remember
offhand whether this bit gets cleared when inside an ISR, but it won't
hurt to set it anyway.

Have fun!

-Ben-
From: max on 12 Oct 2009 07:20
>On Oct 11, 2:41=A0pm, "max" <ch...(a)e-chaos.com> wrote:
>> Hi,
>>
>> I'm using the ML403 board for the interrupt-based system. In this
system,
>> floating point operations in interrupt handler are required and APU is
>> employed to accelerate the single precision floating point operation.
The
>> software is running with the standalone BSP on the PPC.
>> ...
>> It seems that PPC is blocked when timer interrupt handler
>> =93TimerCounterHandler=94 is executed. Any advice on how to resolve the
>> problem.
>
>When the PowerPC enters an interrupt handler, the MSR is altered in a
>number of ways. One of those ways is that MSR[FP] is set to zero. This
>means that, by default, you cannot use floating-point instructions
>within an interrupt handler. To do so, you would have to re-enable the
>FPU by writing a 1 to MSR[FP] at the start of your ISR.
>
>If in your C code you #include "xpseudo_asm.h" from the PowerPC405
>driver, then you should be able to write something like
>
> mtmsr(mfmsr() | XREG_MSR_FLOATING_POINT_AVAILABLE);
>
>There is another MSR bit defined by Xilinx which you might have to
>modify, which is bit 6 (XREG_MSR_APU_AVAILABLE). I can't remember
>offhand whether this bit gets cleared when inside an ISR, but it won't
>hurt to set it anyway.
>
>Have fun!
>
> -Ben-
>

Hi Ben,
Thank you for your response. After adding
"mtmsr(mfmsr() | XREG_MSR_FLOATING_POINT_AVAILABLE);"
to the interrupt handler, it works now.

Best Regards,
Max



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