synthesizing a completely empty design for an FPGA to measure ?quiescent current
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From: glen herrmannsfeldt on 29 Jan 2010 19:15 EE EE <eengr.usa(a)gmail.com> wrote: > I want to synthesize a completely empty design, no clocks no combo and > no sequential logic for a xilinx FPGA using ISE. In the old days there was LCAEdit that would allow one to edit the design at the LUT/switch level. I think if you open LTAEdit you can just say SAVE without adding anything and you get an empty design. I thought a similar tool still existed. Otherwise, you need more control over the output than synthesis tools will give you. -- glen |