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From: ucfchuck on 30 Dec 2009 09:21 i have a cypress fx2lp usb2 that emulates an ACE hdl player and outputs the Jtag directly to an XCF32P and an SX55. there are a couple of issues i am still not sure about though, 1- on a TDO check, the ace file gives me the output data for TDI, a mask, and an expected return value. The SX55 and XCF32P have a combined TDO buffer of 26 bits, so from what i gather i dont get the data back out for 26 clock cycles, does this mean that i should just continue clocking with no new instructions or data until i get all the data back or do i continue feeding in new instructions and just wait the 26 clocks like that? 2- what is the maximum TDO length for an ACE file? i have the FX2LP packed full and can barely fit in another byte of storage, if i have to hold 100+ bytes in ram to check later im kind of screwed... 3- the XAPP424 talks about having to clock on the runtest instruction if it is configuring an FPGA, the FX2LP link is not exactly fast enough to continuously feed data through so the clock is sometimes just held high or low for slightly longer periods on different instructions as im just bit-banging it. should i slow it all down so i have a continuous clock period or does it not matter as only the rising edge and minimum clock high periods are the only important parts?
From: ucfchuck on 30 Dec 2009 12:07 I realized i was reading the TDO instructions incorrectly from the XAPP424 and so i only need to store 26 bits or mask and 26 of expected TDO and 26 bits of received TDO, i thought it was <opcode><all TDI data><all TDO expected><all TDO mask>, but it looks like it is broken into bytes of each... <0x04><numbits> <TDI byte> <TDO exp byte> <TDO mask byte> <TDI byte> <TDO exp> ... unfortunately it takes about an hour to run this programming procedure as the ace file is about 40MB which has to go down endpoint0 and i have an error check so its 2 transfers for every 32bytes. i will update if it worked... --------------------------------------- This message was sent using the comp.arch.fpga web interface on http://www.FPGARelated.com
From: ucfchuck on 30 Dec 2009 14:09
still not programming.... --------------------------------------- This message was sent using the comp.arch.fpga web interface on http://www.FPGARelated.com |