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From: Jon Beniston on 2 Feb 2006 07:44

cs_posting(a)hotmail.com wrote:
> Ray Andraka wrote:
>
> > Alternatively, you could generate ascii binary in your external
> > application and past that into an array of bit_vectors directly.
>
> This is where I like verilog's include directive... no pasting
> required.

Recent versions of Synplify are very handy in that they can synthesize
$readmemb/h statements to create both ROMs and initialised RAMs.

Cheers,
Jon

From: Benjamin Marpe on 2 Feb 2006 17:39
Hi everybody,

thank you all for your answers and informations !
I'll give it a try !

Bye, BEN



news.verizon.net wrote:
> Ben,
>
> I used a DDS LogiCORE to generate the sine (and cosine) and then a pair
> of two-complementor LogiCORE to handle the BPSK; you wire the data value to
> the BYPASS pin. Works like a champ.
>
> Marty
>
> martin dot ryba (at) verizon dot net
>
> "Ben Marpe" <Ben.Marpe(a)gmx.de> wrote in message
> news:1138801274.996807.307800(a)g49g2000cwa.googlegroups.com...
> Hi everybody,
>
> I'm trying to implement a BPSK modulation.
> A sin waveform has to be generated at a given frequency (1MHz) with
> phase offset (binary PSK i.e. 180?) when transition occures on a data
> wire.
>
> Is there any "simple" LogiCORE with BPSK functionality available for my
> Xilinx Spartan-3 - Board ?
>
> My attempt would be a LUT in BRAM - but do I have to fill its content
> manualy ? The LUT content (e.g. 16bit) could drive a DAC.
>
> On the other hand, If I'm forced to use a external DAC, I might use a
> DDS (e.g. AD9834) with all BPSK functionality on chip... ?!?
>
> I'm interested in your ideas and suggestions !
>
> Bye, BEN
>
>
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