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From: Jan Panteltje on 4 Nov 2006 12:45
On a sunny day (Sat, 04 Nov 2006 04:36:24 GMT) it happened joseph2k
<quiettechblue(a)yahoo.com> wrote in
<cNU2h.4092$9v5.2253(a)newssvr29.news.prodigy.net>:

>Jan Panteltje wrote:
>
>> On a sunny day (1 Nov 2006 16:13:34 -0800) it happened
>> sp_mclaugh(a)yahoo.com wrote in
>> <1162426414.492459.247670(a)k70g2000cwa.googlegroups.com>:
>>
>>>As an aside, for VGA (not broadcasted television), do we really even
>>>need the PLL? I'm not suggesting using a non-locked local oscillator,

>> In theory at _one_ frequency, no PLL needed.
>In practice Yes, it is required to keep the horizontal and vertical blanking
>from wandering all over the screen.

That is actually not correct, in old TV vertical was just a hard synced blocking
oscillator, and V blanking was derived from the back EMF of the vertical out,
and H blanking form the line output transformer.
In such a case blanking 'cannot 'wander' if you are in sync.
Ever had an old TV with H and V frequency control?
I still have a portable that has it :-)




>> If the oscillator needs to lock over a high frequency a PLL circuit as I
>> did show has advantages.
>> But most important is, that if your sync was to interrupt, the scanning
>> of the CRT would stop, and the spot would burn in in the centre.
>
>Not at all, the horizontal and vertical oscillators would free run as
>designed. Moreover the anode high voltage is derived from the horizontal
>sweep and no sweep translates sooner or later to no anode voltage.

Maybe you should read again what the OP posted.
He sort of suggested originally that you could derive the ramp from the sync pulse.
This is possible, but there would be no scan when no sync, and burn in.
There is enough energy when scanning stops in the HV to burn in the tube before
the HV is also gone.
In the very old days when you switched the set off, the picture would
become smaller and smaller, and disappear in a point.
These days there is a deliberate blanking circuit to prevent this.



>> You want a picture even without input signal, my monitor then displays
>> a warning message about 'check signal cable'.
>> A CRT can burn in in a fraction of a second when all the energy goes to
>> one focussed spot on the screen.
>
>I have not had quick burn problems with my o'scopes. YMMV

We are talking TV, not scopes.
I have had CRT burn in in less then a second (and expensive case,
you need a new tube).
There is a safety normally when you do niot connect the scan coils,
but in the Philips set the safety did not work....
It is often just a bridge on the connector that allows voltage to
the H part.


>>>Now to apply this information to what I'm doing with VGA:
>>>
>>>So if a CRT was built using the type of circuit you described, the
>>>*duration* of the h-sync pulses shouldn't matter, so long as they are
>>>long enough to bring the current in the inductor back to zero, right?
>
>They have to synchronize the horizontal oscillator, and for color TV gate
>the chroma burst PLL. The other issues are internal to the display.

This is true, but incomplete.
As only the leading edge of H is used, no problem making it wider if
composite sync in.
In comp video in FBAS (was not the OP question) you would indeed lose the burst.

>V-sync is not nearly so straight forward. Google for NTSC and look for a
>thorough explanation of vertical sync; to be worthwhile it will include
>"equalizing pulses". Now there is a can of worms for you.

Actually I had TV too on the scope :-)
Not digital, Z input.

From: joseph2k on 5 Nov 2006 16:53
Jan Panteltje wrote:

> On a sunny day (Sat, 04 Nov 2006 04:36:24 GMT) it happened joseph2k
> <quiettechblue(a)yahoo.com> wrote in
> <cNU2h.4092$9v5.2253(a)newssvr29.news.prodigy.net>:
>
>>Jan Panteltje wrote:
>>
>>> On a sunny day (1 Nov 2006 16:13:34 -0800) it happened
>>> sp_mclaugh(a)yahoo.com wrote in
>>> <1162426414.492459.247670(a)k70g2000cwa.googlegroups.com>:
>>>
>>>>As an aside, for VGA (not broadcasted television), do we really even
>>>>need the PLL? I'm not suggesting using a non-locked local oscillator,
>
>>> In theory at _one_ frequency, no PLL needed.
>>In practice Yes, it is required to keep the horizontal and vertical
>>blanking from wandering all over the screen.
>
> That is actually not correct, in old TV vertical was just a hard synced
> blocking oscillator,
And how do you achieve that without the equivalent of phase locking?

> and V blanking was derived from the back EMF of the
> vertical out,

Not in the sets that i have schematics to. Nor does that invalidate the
fact that vertical blanking is transmitted as part of the NTSC, PAL and
SECAM formats.

> and H blanking form the line output transformer.
> In such a case blanking 'cannot 'wander' if you are in sync.
> Ever had an old TV with H and V frequency control?
> I still have a portable that has it :-)
>
>
>
>
>>> If the oscillator needs to lock over a high frequency a PLL circuit as I
^ range

>>> did show has advantages.
>>> But most important is, that if your sync was to interrupt, the scanning
>>> of the CRT would stop, and the spot would burn in in the centre.
>>
>>Not at all, the horizontal and vertical oscillators would free run as
>>designed. Moreover the anode high voltage is derived from the horizontal
>>sweep and no sweep translates sooner or later to no anode voltage.
>
> Maybe you should read again what the OP posted.
> He sort of suggested originally that you could derive the ramp from the
> sync pulse. This is possible, but there would be no scan when no sync, and
> burn in. There is enough energy when scanning stops in the HV to burn in
> the tube before the HV is also gone.
> In the very old days when you switched the set off, the picture would
> become smaller and smaller, and disappear in a point.

I remember those old sets, with a bright spot in the center as the anode
voltage decayed, it also spread out as focus voltage decayed which is
partly derived from anode voltage. They did not burn out either.

> These days there is a deliberate blanking circuit to prevent this.
>
>
>
>>> You want a picture even without input signal, my monitor then displays
>>> a warning message about 'check signal cable'.
>>> A CRT can burn in in a fraction of a second when all the energy goes to
>>> one focussed spot on the screen.
>>
>>I have not had quick burn problems with my o'scopes. YMMV

Nor did the old TVs from the late 1940s and early 1950s.

>
> We are talking TV, not scopes.
> I have had CRT burn in in less then a second (and expensive case,
> you need a new tube).
> There is a safety normally when you do niot connect the scan coils,
> but in the Philips set the safety did not work....
> It is often just a bridge on the connector that allows voltage to
> the H part.
>
>
>>>>Now to apply this information to what I'm doing with VGA:
>>>>
>>>>So if a CRT was built using the type of circuit you described, the
>>>>*duration* of the h-sync pulses shouldn't matter, so long as they are
>>>>long enough to bring the current in the inductor back to zero, right?
>>
>>They have to synchronize the horizontal oscillator, and for color TV gate
>>the chroma burst PLL. The other issues are internal to the display.
>
> This is true, but incomplete.
> As only the leading edge of H is used, no problem making it wider if
> composite sync in.

Of equal importance is how much wider? all the way to line time?

> In comp video in FBAS (was not the OP question) you would indeed lose the
> burst.

A subset of the width issue.

>
>>V-sync is not nearly so straight forward. Google for NTSC and look for a
>>thorough explanation of vertical sync; to be worthwhile it will include
>>"equalizing pulses". Now there is a can of worms for you.

Please explain equalizing pulses.

>
> Actually I had TV too on the scope :-)
> Not digital, Z input.
See within.
--
JosephKK
Gegen dummheit kampfen die Gotter Selbst, vergebens.  
--Schiller
From: Jan Panteltje on 5 Nov 2006 17:37
On a sunny day (Sun, 05 Nov 2006 21:53:39 GMT) it happened joseph2k
<quiettechblue(a)yahoo.com> wrote in
<D3t3h.5345$9v5.3328(a)newssvr29.news.prodigy.net>:

>> That is actually not correct, in old TV vertical was just a hard synced
>> blocking oscillator,
>And how do you achieve that without the equivalent of phase locking?

Not sure what you mean here, normally the V osc would run slow, here is
a (simplyfied) diagram that I used for example in a design.

----------------------------------------- +12V
| | |
[ ] [ ] R1 [ ]
| | |--------------------------------
| |</ e | |
|---| PNP T1 | T2 |
| |\ c |-- [ ]
T1 | --------\ | unijunction transistor |
| | |-- | T3
| | |------------ B pulse out \| NPN
| |---A | |--===----- V sync
| | | [ ] //|
--->| | === | |
| | | | C1 | |
| | | | |
------------------------------------------------------------------------------ 0V
V hold poti



It _had_ to run slow, so it could be triggered before the restart,
When the V sync causes T3 to conduct the UJT trigger voltage level is slightly lowers, and
it triggers.
The trigger will _coincide_ with the V pulse, so is also phase locked.





>> and V blanking was derived from the back EMF of the
>> vertical out,
>
>Not in the sets that i have schematics to. Nor does that invalidate the
>fact that vertical blanking is transmitted as part of the NTSC, PAL and
>SECAM formats.

Yes, but only in composite video (FBAS).
There is a very simple and obvious reason why it _must_ be so: as the set runs free
(no station) you _still_ want the retrace of H (the flyback) and of V from bottom
to top, suppressed!
It is usually done by pulsing one of the anodes of the CRT with a signal derived from
a tap on the H output transformer, and somewhere from the V, the same circuit will
often also suppress the spot.

I forgot to point out that in modern KTVs the HV cascades (voltage multipliers) have considerable
capacitance too, with plenty of energy to do damage to the phosphors.


>> Maybe you should read again what the OP posted.
>> He sort of suggested originally that you could derive the ramp from the
>> sync pulse. This is possible, but there would be no scan when no sync, and
>> burn in. There is enough energy when scanning stops in the HV to burn in
>> the tube before the HV is also gone.
>> In the very old days when you switched the set off, the picture would
>> become smaller and smaller, and disappear in a point.
>
>I remember those old sets, with a bright spot in the centre as the anode
>voltage decayed, it also spread out as focus voltage decayed which is
>partly derived from anode voltage. They did not burn out either.

Yes out of focus helps, normal BW sets had only about 15kV, color sets have
25kV.


>Nor did the old TVs from the late 1940s and early 1950s.

Line burn in often happened, I have had a TV repair shop too, repaired thousands (no joking),
and line burn in I have seen too.
Even some old scopes (at about 4kV) had line burn in (remember DG57-34???).

>> This is true, but incomplete.
>> As only the leading edge of H is used, no problem making it wider if
>> composite sync in.
>
>Of equal importance is how much wider? all the way to line time?

Sure, more then half a line and you f*ck up the reverse H in the V in composite.


>>>V-sync is not nearly so straight forward. Google for NTSC and look for a
>>>thorough explanation of vertical sync; to be worthwhile it will include
>>>"equalizing pulses". Now there is a can of worms for you.
>
>Please explain equalizing pulses.


Glad you asked.
We have to look a 3 different cases in case of sync:

1) Composite video (with composite sync).
2) Composite sync, 'S" input.
3) Separate H and V sync inputs (as in VGA 9 pole connector, the OP was talking about originally).

To start with 3 (simplest) most of the time the computer display is not interlaced, and
H and V can just be simple pulses, there need not even be a frequency lock (both derived
from the same clock etc).
And in case of interlace you need no 'egalisation' in fact.

This brings me to your question in case '1' and '2'.
The original reason for the egalisation pulses is dead simple, and almost never mentioned.
The intention was to have the (interlaced) receiver sync separator circuit
_as_simple_as_possible_.

The egalisation pulses are there to make sure the V integrator capacitor is charged in such
a way that the vertical retrace will start at half a line (625 / 2 = 312 1/2 in European PAL).

This system was designed so you could just with a simple differentiator and integrator split the composite sync.

.
.
integrator .
neg polarity R . ramp build up during v sync.
comp sync ----------====-------------- V sync .
| |
| === C
| |
| ///
| |\
| differentiator | \
| | | C ___ __| \_____
-----| |---------------- H sync | /
| | | | /
| |/
[ ] R This edge is used (_also_ in egalisation pulses!)
|
///


It must again be stressed that the comp sync does not need any egalisation pulses if the display
is not interlaced.
maybe some of you will remember the real start of computing, Motorola max-board with 6845 CRT
controller, you just made comp sync by xoring a H p
From: joseph2k on 7 Nov 2006 07:11
Jan Panteltje wrote:

> On a sunny day (Sun, 05 Nov 2006 21:53:39 GMT) it happened joseph2k
> <quiettechblue(a)yahoo.com> wrote in
> <D3t3h.5345$9v5.3328(a)newssvr29.news.prodigy.net>:
>
>>> That is actually not correct, in old TV vertical was just a hard synced
>>> blocking oscillator,
>>And how do you achieve that without the equivalent of phase locking?
>
> Not sure what you mean here, normally the V osc would run slow, here is
> a (simplyfied) diagram that I used for example in a design.
>
> ----------------------------------------- +12V
> | | |
> [ ] [ ] R1 [ ]
> | | |--------------------------------
> | |</ e | |
> |---| PNP T1 | T2 |
> | |\ c |-- [ ]
> T1 | --------\ | unijunction transistor |
> | | |-- | T3
> | | |------------ B pulse out \| NPN
> | |---A | |--===-----
> | |V sync
> | | | [ ] //|
> --->| | === | |
> | | | | C1 | |
> | | | | |
>
------------------------------------------------------------------------------
> 0V
> V hold poti
>
>
>
> It _had_ to run slow, so it could be triggered before the restart,
> When the V sync causes T3 to conduct the UJT trigger voltage level is
> slightly lowers, and it triggers.
> The trigger will _coincide_ with the V pulse, so is also phase locked.
>

Hmmm, the equivalent of a PLL.

>
>
>
>
>>> and V blanking was derived from the back EMF of the
>>> vertical out,
>>
>>Not in the sets that i have schematics to. Nor does that invalidate the
>>fact that vertical blanking is transmitted as part of the NTSC, PAL and
>>SECAM formats.
>
> Yes, but only in composite video (FBAS).
> There is a very simple and obvious reason why it _must_ be so: as the set
> runs free (no station) you _still_ want the retrace of H (the flyback) and
> of V from bottom to top, suppressed!
> It is usually done by pulsing one of the anodes of the CRT with a signal
> derived from a tap on the H output transformer, and somewhere from the V,
> the same circuit will often also suppress the spot.
>
> I forgot to point out that in modern KTVs the HV cascades (voltage
> multipliers) have considerable capacitance too, with plenty of energy to
> do damage to the phosphors.
>

Generating a reasonable steady voltage from microsecond wide pulses does
take some energy storage.

>
>>> Maybe you should read again what the OP posted.
>>> He sort of suggested originally that you could derive the ramp from the
>>> sync pulse. This is possible, but there would be no scan when no sync,
>>> and burn in. There is enough energy when scanning stops in the HV to
>>> burn in the tube before the HV is also gone.
>>> In the very old days when you switched the set off, the picture would
>>> become smaller and smaller, and disappear in a point.
>>
>>I remember those old sets, with a bright spot in the centre as the anode
>>voltage decayed, it also spread out as focus voltage decayed which is
>>partly derived from anode voltage. They did not burn out either.
>
> Yes out of focus helps, normal BW sets had only about 15kV, color sets
> have 25kV.
>

Anode voltage and mean operating current have little to do with it. While i
have not serviced the sheer quantity of sets you have, i have had far more
problems with computer monitors having burn in. This seems to match my
understanding of the erosion model.

BTW i have a LCD monitor exhibiting the equivalent of burn in now.

>
>>Nor did the old TVs from the late 1940s and early 1950s.
>
> Line burn in often happened, I have had a TV repair shop too, repaired
> thousands (no joking), and line burn in I have seen too.
> Even some old scopes (at about 4kV) had line burn in (remember
> DG57-34???).

I saw line burn in on a scope only once, and only heard reports of it on
TV's.

>
>>> This is true, but incomplete.
>>> As only the leading edge of H is used, no problem making it wider if
>>> composite sync in.
>>
>>Of equal importance is how much wider? all the way to line time?
>
> Sure, more then half a line and you f*ck up the reverse H in the V in
> composite.
>
>
>>>>V-sync is not nearly so straight forward. Google for NTSC and look for
>>>>a thorough explanation of vertical sync; to be worthwhile it will
>>>>include
>>>>"equalizing pulses". Now there is a can of worms for you.
>>
>>Please explain equalizing pulses.
>
>
> Glad you asked.
> We have to look a 3 different cases in case of sync:
>
> 1) Composite video (with composite sync).
> 2) Composite sync, 'S" input.
> 3) Separate H and V sync inputs (as in VGA 9 pole connector, the OP was
> talking about originally).
>
> To start with 3 (simplest) most of the time the computer display is not
> interlaced, and H and V can just be simple pulses, there need not even be
> a frequency lock (both derived from the same clock etc).
> And in case of interlace you need no 'egalisation' in fact.
^equalization
See below.

>
> This brings me to your question in case '1' and '2'.
> The original reason for the egalisation pulses is dead simple, and almost
> never mentioned. The intention was to have the (interlaced) receiver sync
> separator circuit _as_simple_as_possible_.

No, it has to do with maintaining h-sync.

>
> The egalisation pulses are there to make sure the V integrator capacitor
> is charged in such a way that the vertical retrace will start at half a
> line (625 / 2 = 312 1/2 in European PAL).
>

Equalization pulses bent the H sync so that it would be back in place at the
end of V sync. They occur on blank lines both before and after the V sync
series.

> This system was designed so you could just with a simple differentiator
> and integrator split the composite sync.
>
> .
>
From: Jan Panteltje on 7 Nov 2006 08:03
On a sunny day (Tue, 07 Nov 2006 12:11:30 GMT) it happened joseph2k
<quiettechblue(a)yahoo.com> wrote in
<SJ_3h.1040$6t.318(a)newssvr11.news.prodigy.com>:

>BTW i have a LCD monitor exhibiting the equivalent of burn in now.

There was an interesting thread in comp.ibm.hardware.chips about the
'LCD" 'burn in' or storage effect, depending on the system and manufacturer
it sometimes helps to display white for say a night.


>> Line burn in often happened, I have had a TV repair shop too, repaired
>> thousands (no joking), and line burn in I have seen too.
>> Even some old scopes (at about 4kV) had line burn in (remember
>> DG57-34???).
>
>I saw line burn in on a scope only once, and only heard reports of it on
>TV's.

First a correction, I think the tube was DG7-32
http://members.chello.nl/~h.dijkstra19/page3.html
It is the small one next to the big radar tube.....
This was my first oscilloscope 'design' (well I designed the power supply),
it was a tube oscilloscope, probably 1MHz bandwidth, no trigger, just 'sync'.
A year later I designed a transistor one, with video output transistors in
the deflection, real trigger, double timebase, on a printed ciruit with RTL logic!
But anyways, this DG7-32 burned in in the first hour or so...


>> composite.
>>
>>
>>>>>V-sync is not nearly so straight forward. Google for NTSC and look for
>>>>>a thorough explanation of vertical sync; to be worthwhile it will
>>>>>include
>>>>>"equalizing pulses". Now there is a can of worms for you.
>>>
>>>Please explain equalizing pulses.
>>
>>
>> Glad you asked.
>> We have to look a 3 different cases in case of sync:
>>
>> 1) Composite video (with composite sync).
>> 2) Composite sync, 'S" input.
>> 3) Separate H and V sync inputs (as in VGA 9 pole connector, the OP was
>> talking about originally).
>>
>> To start with 3 (simplest) most of the time the computer display is not
>> interlaced, and H and V can just be simple pulses, there need not even be
>> a frequency lock (both derived from the same clock etc).
>> And in case of interlace you need no 'egalisation' in fact.
> ^equalization
>See below.
>
>>
>> This brings me to your question in case '1' and '2'.
>> The original reason for the egalisation pulses is dead simple, and almost
>> never mentioned. The intention was to have the (interlaced) receiver sync
>> separator circuit _as_simple_as_possible_.
>
>No, it has to do with maintaining h-sync.

Eh, yes and no.
In the olden days the time constant in the H PLL was really big, so the set
would just carry on at last freq if bad signal.
Then VHS came, and it had big timing errors in H due to the head position
changes, a big jump in H at the end of the frame (and missing lines at the
head switch-over).
So then sets got a much shorter timeconstant for H.
There was a time TV sets had 2 time constants.




>> The egalisation pulses are there to make sure the V integrator capacitor
>> is charged in such a way that the vertical retrace will start at half a
>> line (625 / 2 = 312 1/2 in European PAL).
>>
>
>Equalization pulses bent the H sync so that it would be back in place at the
>end of V sync. They occur on blank lines both before and after the V sync
>series.


Yes I know where they are.
Let's go a bit deeper:
If you xor the H with a longer V you get reversed H, but now the H starts posive,
and trhe differentiator in the sync separator deleivers a negatibve pulse, and
as we were using the negative pulse it is about 4.7uS late.
However the H PLL will adjust in few lines.

-- ------------ ------------ --
| | | | | | |
| | | | | | |
-- -- ------------- ---
|| ||
|| ||
|| ||
position of 'optional' egalisation pulses.


>> This system was designed so you could just with a simple differentiator
>> and integrator split the composite sync.
>>
>> .
>> .
>> integrator .
>> neg polarity R . ramp build up
>> during v sync. comp sync ----------====-------------- V sync .
>> | |
>> | === C
>> | |
>> | ///
>> | |\
>> | differentiator | \
>> | | | C ___ __| \_____
>> -----| |---------------- H sync | /
>> | | | | /
>> | |/
>> [ ] R This edge is used (_also_ in
>> [ egalisation pulses!)
>> |
>> ///
>>
>>
>> It must again be stressed that the comp sync does not need any egalisation
>> pulses if the display is not interlaced.
>> maybe some of you will remember the real start of computing, Motorola
>> max-board with 6845 CRT controller, you just made comp sync by xoring a H
>> pulse with a V pulse....... And the TV would be nicely locked.
>> And that twas even a common clock.

>You forget it only displayed on even fields. It was not until the 6845A
>that you could even try to use both vertical scans and even then it did not
>work correctly.

Actually in the above drawing the V ramp is negative of course.....

I would have to climb in the attic, but I had interlace on a Z80 system
I designed with a 6845, but not sure it was 'A' or not.

Interlace is just a phase relationship between H and V, if you have a
Lissajous (spelling) display of 2 sine waves on the scope, you can phase adjust
so the lines do not overlap (pairing it is called).
The extra pulses cause the V integrator cap to charge a bit different, and
change the phase where the V triggers.
That is what was in my TV study book (no idea who wrote it, but it was good).

I think the H frequency does not _normally_ 'jump' during V sync (as in VHS).
It is just a matter of phase of V.
You can generate a 15 kHz sawto
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