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From: sp_mclaugh on 26 Nov 2006 23:44
Hello,

I'm current designing a device which will digitally convert an analog
(NTSC) signal to RGB (for use in VGA). I have some questions at the
bottom of this post. The system design consists of:

- 50 MHz FPGA
- 50 MSPS 10-bit ADC with video clamping
- Matching DAC
- Baseband NTSC composite video source
- VGA monitor

The FPGA includes the following sub-blocks

- Polyphase resampler - converts sampled data to 4 * color subcarrier
frequency (I think this is the correct term, but I'm not sure. I'm
basically interpolating and then decimating by integer factors)

- Low pass filters - I plan on using windowed sinc (FIR) filters for
everything, unless there is a compelling reason not to

- Numerically controlled oscillator - I will store a table with a
quarter cycle of a sinusoid, and use trig properties to calculate the
rest. The index will be N-bits long, and the table will have
significantly less than 2^N entries. Only the most significant bits of
the index will be used, and the lower bits will actually be used for
interpolation (this idea isn't originally mine).

- Digital PLL or digital Costas loop - Any advice as to which to use?
Needed to lock onto color burst to generate reference color subcarrier.
I plan on using TWO seperate PLL's, since the chroma subcarrier is
phase-inverted on each line. Each PLL will be updated alternately,
every other color burst. This will minimize tracking requirements, I
think.

- 2D adaptive comb filter - takes advantage of the fact that the chroma
subcarrier is phase inverted on each sucessive line to allow good
seperation of luminance and chrominance. Since the data has been
resampled to 4 * Fsc, there will be a constant number of samples per
line, and the pixels will "line up", making the comb filter easier to
implement.

- QAM demodulator - Uses the PLL or Costas loop reference color
subcarrier to demodulate the chroma signal. Needs only multiplier(s)
and low pass filters. I'm going to use narrowband color and demodulate
I and Q with 0.5 MHz bandwidth each.

- Sync detector

- Matrix to convert from (Y, I, V) to (R, G, B)

- Video buffer at 640x480. Each time a field is digitized, every other
line of the buffer will be updated. The VGA output will run at 60 Hz,
giving the same interlaced appearance as a regular TV. There may be
better ways to do this, but this is simple and easy. I'd rather not
deal with motion compensation.

- VGA output generator - Reads video buffer, generates RGB, sync
pulses, etc

QUESTIONS:

- I have found a few ADC's that are up to the task, but does anyone
know of one that is particularly easy for prototyping? I've never done
any surface mount soldering before. I did read about a way to use
solder paste and reflow in a toaster oven, but it'll probably be
trickier than it sounds. I don't suppose anyone makes a high speed
video flash-ADC in a DIP format? :-)

- Low pass filters are used in a few places above (in the Costas loop,
in the chroma demodulator, and in the interpolation part of the
polyphase resampler). I planned on using windowed sinc filters
everywhere, just because that's what I'm most comfortable with. Can
anyone give me a reason not to? And if so, what would be recommended?

- If anyone is willing to go over polyphase resampling or digital PLL's
/ Costas loops, let me know. I'll post my current understanding
(courtesy of google), and see if it is flawed. I think I get it, but...
this is all fairly new to me. The best resources I found were from a
place called "ChipCenter", but there wasn't a whole lot of other
material that was helpful. Lots of IC datasheet results, which made it
hard to find info on the theory.

- Any other pointers, or things to watch out for? A lot of this is
fairly new to me, though I can at least "hold my own" on the FPGA side
of things.

Thanks in advance !

Sean

From: Jan Panteltje on 27 Nov 2006 05:34
On a sunny day (26 Nov 2006 20:44:23 -0800) it happened sp_mclaugh(a)yahoo.com
wrote in <1164602663.375523.80770(a)f16g2000cwb.googlegroups.com>:

>QUESTIONS:
>
>- I have found a few ADC's that are up to the task, but does anyone
>know of one that is particularly easy for prototyping? I've never done
>any surface mount soldering before. I did read about a way to use
>solder paste and reflow in a toaster oven, but it'll probably be
>trickier than it sounds. I don't suppose anyone makes a high speed
>video flash-ADC in a DIP format? :-)

Sure, TDA8708A.
As to the rest of the project, you probably know Philips (or
whatever name they use these days) has chips that do all that color
digitising and demodulation, but not in DIP I think.

I do not have a lot of time now, I will read you posting again later.
From: sp_mclaugh on 27 Nov 2006 11:06
Jan Panteltje wrote:

> >I don't suppose anyone makes a high speed
> >video flash-ADC in a DIP format? :-)
>
> Sure, TDA8708A.

Wow, I was actually being sarcastic, but that just made my life easier!
I was just about to go pick out a nice new toaster oven...

> As to the rest of the project, you probably know Philips (or
> whatever name they use these days) has chips that do all that color
> digitising and demodulation, but not in DIP I think.

True, though part of the main theme of this project is keeping
component count down. I'd like to do everything on the FPGA (except I
can't get around an external ADC). I have no plans to commercialize
this project, though I will likely use it myself. I see this becoming
one of those projects that I add on to from time-to-time to use as a
testbed for new designs (perhaps I'll decide to test out a 3d adaptive
comb filter next year, or direct IF sampling, etc).

> I do not have a lot of time now, I will read you posting again later.

Thanks, this first post has been a big help already w/ the chip
recommendation !

Sean

From: panteltje on 27 Nov 2006 13:35
p_mclaugh(a)yahoo.com schreef:

> Hello,
>
> I'm current designing a device which will digitally convert an analog
> (NTSC) signal to RGB (for use in VGA). I have some questions at the
> bottom of this post. The system design consists of:
>
> - 50 MHz FPGA
> - 50 MSPS 10-bit ADC with video clamping
> - Matching DAC
> - Baseband NTSC composite video source
> - VGA monitor

FPGA board?


> The FPGA includes the following sub-blocks
>
> - Polyphase resampler - converts sampled data to 4 * color sub carrier
> frequency (I think this is the correct term, but I'm not sure. I'm
> basically interpolating and then decimating by integer factors)

mm


> - Low pass filters - I plan on using windowed sinc (FIR) filters for
> everything, unless there is a compelling reason not to

OK

> - Numerically controlled oscillator - I will store a table with a
> quarter cycle of a sinusoid, and use trig properties to calculate the
> rest. The index will be N-bits long, and the table will have
> significantly less than 2^N entries. Only the most significant bits of
> the index will be used, and the lower bits will actually be used for
> interpolation (this idea isn't originally mine).

I multiplied the 50MHz FPGA clock to 200MHz (DCM), this gives
quadrature signals at 200MHz....


> - Digital PLL or digital Costas loop - Any advice as to which to use?
> Needed to lock onto color burst to generate reference color subcarrier.
> I plan on using TWO seperate PLL's, since the chroma subcarrier is
> phase-inverted on each line. Each PLL will be updated alternately,
> every other color burst. This will minimize tracking requirements, I
> think.

I found that tricky, so for PAL I used an external Xtal 4.43 (or 8.86
MHz).
I found that tricky, so for PAL I used an external Xtal 4.43 (or 8.86
MHz).
:-)


> - 2D adaptive comb filter - takes advantage of the fact that the chroma
> subcarrier is phase inverted on each sucessive line to allow good
> seperation of luminance and chrominance. Since the data has been
> resampled to 4 * Fsc, there will be a constant number of samples per
> line, and the pixels will "line up", making the comb filter easier to
> implement.




> - QAM demodulator - Uses the PLL or Costas loop reference color
> subcarrier to demodulate the chroma signal. Needs only multiplier(s)
> and low pass filters. I'm going to use narrowband color and demodulate
> I and Q with 0.5 MHz bandwidth each.
>
> - Sync detector

This will depend on how accurate you can get subcarrier lock.
With a 50 MHz clock you have a tick every 20 nS, for NTSC period time
is
some 300 ns? (an estimate, I am in PAL land) so and you want to sample
2
times in a period, your sample target:

I Q

. * .
. .* * .
. * . * .
.. _____ *______ . ____________________ . _______________________
* . .
. .
.

300ns
<----------------------------------------->
| |
| sample Q sample Q
| | | |
sample I | sample I |
------> 75ns | -----> 225ns |
| |
------------------> 150ns ----> 300ns


Using the 50 MHz clock with 20 ns resolution will never give you the
exact sample point.
With a 200 MHz clock you have 5 ns resolution (should be enough), with
a 200 MHz 4 phase
clock 1.25 ns resolution.

This right? This is why I went to 200 MHz.
And a few other reasons too.


> - Matrix to convert from (Y, I, V) to (R, G, B)

That is the easy part, although many standards exist :-)
(ask me if you want to know more, I have tried some...).

> - Video buffer at 640x480. Each time a field is digitised, every other
> line of the buffer will be updated. The VGA output will run at 60 Hz,
> giving the same interlaced appearance as a regular TV. There may be
> better ways to do this, but this is simple and easy. I'd rather not
> deal with motion compensation.

Maybe there is no need for a full frame store, unless you want
to make a time base corrector that can handle asyc input sources,
and sync these to some reference.
I did the line doubler (this is called a line doubler) by simply
storing a line in FPGA block RAM, those are dual port RAMS, and
reading it out at double speed.
Thats is all.
So each line is repeated twice.
That way 15625 Hz becomes 31250 Hz, nice for a VGA monitor,
the 50 (or 60 Hz in your case) stays the same.
You do not even have to sync that clock.

I used a 2x PLL on H to get H sync for the VGA.
Watch out for jitter and lock in range, especially with VHS as input.

Long time ago I tried all this.... Digilentinc digilab2 Spartan2.
Hope I remembered it right.

Analog is better? Looks like it!
LOL

From: a7yvm109gf5d1 on 27 Nov 2006 13:58
Is there any reason you are re-inventing the wheel?

Averlogic AL250
+
Philips SAA7111 (or is that NXP?)

Total cost about 30$.

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