Hysteresis on dsPIC ports?
in [Design]
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From: Jan Panteltje on 26 Jan 2010 13:17 On a sunny day (Tue, 26 Jan 2010 10:05:14 -0800) it happened Joerg <invalid(a)invalid.invalid> wrote in <7s8p6vFadcU1(a)mid.individual.net>: >Nope. Quote from the dsPIC datasheet: "All I/O input ports feature >Schmitt Trigger inputs ..." > > >> It is simply nice that they bothered to point out that gate's behaviour, they did >> not have to. >> LOL >> > >Sorry, for my line of work that is not good enough. How come Texas >Instruments is able to diligently specify the guaranteed min-max values? >See page 24: > >http://focus.ti.com/lit/ds/symlink/msp430f2011.pdf > >_That's_ how a good datasheet is written. I remember reading a datasheet of the new PICs I have, it clearly shows min and max levels for the logical inputs. What more do you want? ftp://panteltje.com/pub/pic_io.jpg Note that this is marked 'preliminary', and is about the 18F14K22 that I just got. I am pretty sure most of these PICs use the same silicon solution. There must exist some datasheet for your type of PIC, This is simply under DC characteristics.
From: Joerg on 26 Jan 2010 13:28 Jan Panteltje wrote: > On a sunny day (Tue, 26 Jan 2010 10:05:14 -0800) it happened Joerg > <invalid(a)invalid.invalid> wrote in <7s8p6vFadcU1(a)mid.individual.net>: > >> Nope. Quote from the dsPIC datasheet: "All I/O input ports feature >> Schmitt Trigger inputs ..." >> >> >>> It is simply nice that they bothered to point out that gate's behaviour, they did >>> not have to. >>> LOL >>> >> Sorry, for my line of work that is not good enough. How come Texas >> Instruments is able to diligently specify the guaranteed min-max values? >> See page 24: >> >> http://focus.ti.com/lit/ds/symlink/msp430f2011.pdf >> >> _That's_ how a good datasheet is written. > > I remember reading a datasheet of the new PICs I have, > it clearly shows min and max levels for the logical inputs. > What more do you want? > ftp://panteltje.com/pub/pic_io.jpg > This is what I want and what other mfgs provide: A min-max guaranteed _spec_ for the hysteresis. > Note that this is marked 'preliminary', and is about the 18F14K22 that I just got. > I am pretty sure most of these PICs use the same silicon solution. > There must exist some datasheet for your type of PIC, > This is simply under DC characteristics. It isn't, see page 263 (attention readers on slow connections, >4MB file): http://ww1.microchip.com/downloads/en/DeviceDoc/70286C.pdf All they tell you is in which range your high and low levels must be, no hysteresis data. When I asked about it they didn't know. In mission critical apps noise immunity is sort of important and without guaranteed specs you can't guarantee your design. No dice with me there, that's a clear red flag for me. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: Jan Panteltje on 26 Jan 2010 13:56 On a sunny day (Tue, 26 Jan 2010 10:28:05 -0800) it happened Joerg <invalid(a)invalid.invalid> wrote in <7s8qhqFig4U1(a)mid.individual.net>: >> it clearly shows min and max levels for the logical inputs. >> What more do you want? >> ftp://panteltje.com/pub/pic_io.jpg >> > >This is what I want and what other mfgs provide: A min-max guaranteed >_spec_ for the hysteresis. No, that datasheet says: if the level is above .8 * Vdd then it will be a one, and if below .2 * Vdd it will be a zero. So you have < .2 * Vdd noise margin from ground and .8 * Vdd noise margin from Vdd. From that follows the max noise you can have on the supply line and ground. I do not see your problem with this spec.
From: Joerg on 26 Jan 2010 14:17 Jan Panteltje wrote: > On a sunny day (Tue, 26 Jan 2010 10:28:05 -0800) it happened Joerg > <invalid(a)invalid.invalid> wrote in <7s8qhqFig4U1(a)mid.individual.net>: > >>> it clearly shows min and max levels for the logical inputs. >>> What more do you want? >>> ftp://panteltje.com/pub/pic_io.jpg >>> >> This is what I want and what other mfgs provide: A min-max guaranteed >> _spec_ for the hysteresis. > > > No, that datasheet says: if the level is above .8 * Vdd then it will be a one, > and if below .2 * Vdd it will be a zero. > So you have < .2 * Vdd noise margin from ground and .8 * Vdd noise margin from Vdd. > Unfortunately that is not what such a spec says. It essentially says that they don't guarantee anything if you are between 0.2*VDD and 0.8*VDD. That has nothing to do with hysteresis. And most definitely not with noise margin. > From that follows the max noise you can have on the supply line and ground. > I do not see your problem with this spec. Well, the guy at Microchip saw it but could not help. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: Jim Thompson on 26 Jan 2010 14:43
On Tue, 26 Jan 2010 11:17:17 -0800, Joerg <invalid(a)invalid.invalid> wrote: >Jan Panteltje wrote: >> On a sunny day (Tue, 26 Jan 2010 10:28:05 -0800) it happened Joerg >> <invalid(a)invalid.invalid> wrote in <7s8qhqFig4U1(a)mid.individual.net>: >> >>>> it clearly shows min and max levels for the logical inputs. >>>> What more do you want? >>>> ftp://panteltje.com/pub/pic_io.jpg >>>> >>> This is what I want and what other mfgs provide: A min-max guaranteed >>> _spec_ for the hysteresis. >> >> >> No, that datasheet says: if the level is above .8 * Vdd then it will be a one, >> and if below .2 * Vdd it will be a zero. >> So you have < .2 * Vdd noise margin from ground and .8 * Vdd noise margin from Vdd. >> > >Unfortunately that is not what such a spec says. It essentially says >that they don't guarantee anything if you are between 0.2*VDD and >0.8*VDD. That has nothing to do with hysteresis. And most definitely not >with noise margin. > > >> From that follows the max noise you can have on the supply line and ground. >> I do not see your problem with this spec. > > >Well, the guy at Microchip saw it but could not help. Maybe do as others here have done, write an E-mail directly to Steve Sanghi ?:-) It's been a couple of years since I did some oscillator design work for them. Some of those people (I believe Don Gerber, for sure) are still there. Tell me what part and what pin spec is your problem? I'll ask privately. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |