From: mares.vit on
I think he is the SDCC original author.
Vit


From: Andreas Ehliar on
On 2007-11-05, Wojciech Zabolotny <wzab(a)ipebio15.ise.pw.edu.pl> wrote:
> The OpenRisc and LEON3 seem to be too big for XC3S500E (or at least I
> was not able to trim them sufficiently for this FPGA).

You might be interested in looking at the Lattice Mico32 as well. It is
also open source and I know that people have used it on Xilinx devices.

/Andreas
From: Wojciech Zabolotny on


On Wed, 7 Nov 2007, ghelbig(a)lycos.com wrote:

> Linux will run on a soft CPU, including ones that fit into the
> XC3S500. There are uClinux ports for both the MicroBlaze and NIOS.
>

Yes, I know, however I'm looking for an open solution, which I could both
give away to students, and to use in some research applications.
So the problem is that the cores should be open source and with
permissive (preferrably free or even GPL) license.

> A point to mention is that uClinux runs without a memory manager.
> There just aren't enough gates to fit one in an FPGA.
>
> If you can't find an open-source port to MicroBlaze or NIOS, look for
> an ARM7 port. An ARM7 is an ARM9 with the memory manager removed.
>

Well, however the only freely available synthesizable ARM7 implementation
is the nnARM, which after its disappearance from OpenCores in 2001 is
still available in many mirrors (just google for sARM_tb.zip ;-) ), but
AFAIK it is not safe to use due to legal issues (and is not complete as well).
--
Thanks and regards,
Wojtek