Modelsim PE vs. Aldec Active-HDL (PE)
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From: Dave on 5 Mar 2010 06:24 > Am I the only one that makes *no* use of the various "project things" > (either in Modelsim or Aldec)? I just have a makefile and use the GUI > to run the sim (from "their" command-line) and show me the waveforms. I do the same so that makes at least two of us! Scripts are best for source control, staying sane and having weekends free...
From: Petter Gustad on 5 Mar 2010 08:23 Martin Thompson <martin.j.thompson(a)trw.com> writes: > Am I the only one that makes *no* use of the various "project things" > (either in Modelsim or Aldec)? I just have a makefile and use the GUI I almost always use my own set of command line tools to run the simulation and eventually I use the waveform viewer for debugging. I've been very happy with VCS in this regard. I never use the bundled project or revision control stuff (I use mostly git and/or svn). Petter -- A: Because it messes up the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. Q: What is the most annoying thing on usenet and in e-mail?
From: rickman on 5 Mar 2010 12:15 On Mar 5, 5:34 am, Martin Thompson <martin.j.thomp...(a)trw.com> wrote: > Andy Peters <goo...(a)latke.net> writes: > > ModelSim has one project file (the .mpf) which is plain text and > > easily edited by hand. > > Various others have also mentioned project files and workspaces and > the like... > > Am I the only one that makes *no* use of the various "project things" > (either in Modelsim or Aldec)? I just have a makefile and use the GUI > to run the sim (from "their" command-line) and show me the waveforms. > I guess I don't like to be tied to a tool (as much as I can manage) > much as I don't like to be tied to a particular silicon vendor (as > much as I can manage :) > > Am I missing something valuable, or is it just different? I doubt you are missing much of any real use. I find the GUI will save me a lot of typing when instantiating modules. I use the "generate test bench" feature to build a file with the meat and potatoes in it and I copy that to the higher level module. Otherwise if I was practiced in using make files with FPGA tools, I would be likely be doing that too. Rick
From: Andy Peters on 5 Mar 2010 16:53 On Mar 5, 10:15 am, rickman <gnu...(a)gmail.com> wrote: > On Mar 5, 5:34 am, Martin Thompson <martin.j.thomp...(a)trw.com> wrote: > > > Andy Peters <goo...(a)latke.net> writes: > > > ModelSim has one project file (the .mpf) which is plain text and > > > easily edited by hand. > > > Various others have also mentioned project files and workspaces and > > the like... > > > Am I the only one that makes *no* use of the various "project things" > > (either in Modelsim or Aldec)? I just have a makefile and use the GUI > > to run the sim (from "their" command-line) and show me the waveforms. > > I guess I don't like to be tied to a tool (as much as I can manage) > > much as I don't like to be tied to a particular silicon vendor (as > > much as I can manage :) > > > Am I missing something valuable, or is it just different? > > I doubt you are missing much of any real use. I find the GUI will > save me a lot of typing when instantiating modules. I use the > "generate test bench" feature to build a file with the meat and > potatoes in it and I copy that to the higher level module. > > Otherwise if I was practiced in using make files with FPGA tools, I > would be likely be doing that too. I don't use any of the Aldec tools that automatically generate test benches or creating instances and all of that. Yes, I'm an emacs vhdl- mode user and emacs does a fantabulous job of all of that. Right now I'm working through the "best" way to set up projects within the GUI, with an eye towards taking this and generating a Makefile or a script or something. It turns out that it is reasonable to create one workspace for an FPGA project and within this workspace create a "design" for the subentities and the top level. If you let it use the design name as the working library for the design, then as long as you "use" the library in a higher-level source, that source can see those other libraries. Now I'm thinking that the usual method of doing: u_foo : entity work.foo port map (bar => bar, bletch => bletch); might be better as: u_foo : entity foo.foo port map (bar => bar, bletch => bletch); The other option is to create a package with a component definition for foo, and analyze that package into the foo library, so the instantiation can be: u_foo : foo port map (bar => bar, bletch => bletch); I really don't know which is "better." -a
From: KJ on 6 Mar 2010 11:18
On Mar 5, 5:34 am, Martin Thompson <martin.j.thomp...(a)trw.com> wrote: > > Am I the only one that makes *no* use of the various "project things" > (either in Modelsim or Aldec)? I just have a makefile and use the GUI > to run the sim (from "their" command-line) and show me the waveforms. > I guess I don't like to be tied to a tool (as much as I can manage) > much as I don't like to be tied to a particular silicon vendor (as > much as I can manage :) > But you're also running *their* commands to compile, run and view so you're not really any more independent. Maintaining make files can be a chore also, unless you use something to help you manage it...but then you're now dependent on that tool as well. > Am I missing something valuable, or is it just different? > Probably depends on which scenario is more likely to occur 1. Change sim tools 2. Add new developers (temporary, or because you move on to something else in the company) If #1 is prevalent, then maybe using other tools to help you manage 'make' is better. If #2 is more prevalent, then using the tool's project system is probably better in easing the transition. If neither is particularly likely...well...then it probably doesn't much matter since one can probably be just as productive with various approaches. Kevin Jennings |