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From: Dek on 22 Feb 2010 06:29 On 11 Feb, 01:12, van...(a)sfu.ca (Peter Van Epp) wrote: > Dek <daniele.deq...(a)gmail.com> writes: > >Hi all, > >as the title says I have to read some information stored in UDP packet > >with an FPGA. Now I'm evaluating 3 options: > >1) Use an external processor and send data to FPGA through dedicated > >lines > >2) Use a microcontroller embedded into the FPGA (i.e. microblaze, > >since I'm working on a Xilinx) > >3) Write an hardware implementation of the IP stack, or at least of he > >part of the stack I need to read those packets > >What are the pros and cons of each solution? Can you suggest me others > >way to do that? > >Thanks all > >Dek > > How fast is the UDP stream (gig or will 10/100 and low throughput do)? > Does your board already have an ethernet PHY or do you need to add one just > for this? If the volume and speed are both low (i.e. 100 or less) there was > a spi interfaced PIC 10/100 board referenced here a while back. That may be > your cheapest solution (the one referenced here is about $20 and Wiznet makes > a bunch more that are a little more expensive). I don't think it will do > anywhere near wire speed, but if your traffic is small enough that may be > the easiest solution (someone else does the IP heavy lifting such as it is and > worries about things like arp :-)). > > Peter Van Epp Thanks you all for the replies, I'm working on an embedded sistem (NI PXIe) and the FPGA is a Virtex5 mounted on a Flex Rio board. I decided to add an SNTP client on the controller PC (wich runs NI real time software) and then comunicate the time information through the backplane. I think it's the easiest solution. Bye Dek
From: Dek on 22 Feb 2010 06:41 On 10 Feb, 16:31, glen herrmannsfeldt <g...(a)ugcs.caltech.edu> wrote: > John McCaskill <jhmccask...(a)gmail.com> wrote: > > (snip) > > > I also have designs that use the FPGA fabric to directly deal with the > > data from the EMAC with out using a processor at all. Those are only > > dealing with UDP and ICMP, and were simple and straight forward. > > What do you do about ARP? > > You won't get the packets unless ARP tells where to send them. > > -- glen I was thinking to follow this implementation: http://www.itee.uq.edu.au/~peters/xsvboard/stack/stack.htm maybe upgrading it to a 10/100Mb Ethernet, but I changed idea. Anyway they says they can handle arp send and arp request properly, but I haven't tested it yet. Bye Dek
From: whygee on 22 Feb 2010 16:01 Dek wrote: > I was thinking to follow this implementation: > > http://www.itee.uq.edu.au/~peters/xsvboard/stack/stack.htm great link but where are the VHDL source files ? > Dek yg -- http://ygdes.com / http://yasep.org
From: Peter Van Epp on 22 Feb 2010 20:55 whygee <yg(a)yg.yg> writes: >Dek wrote: >> I was thinking to follow this implementation: >> >> http://www.itee.uq.edu.au/~peters/xsvboard/stack/stack.htm >great link but where are the VHDL source files ? >> Dek >yg >-- >http://ygdes.com / http://yasep.org on the project home page above that at in a zip file. http://www.itee.uq.edu.au/~peters/xsvboard/index.html Peter Van Epp
From: whygee on 23 Feb 2010 01:06
Peter Van Epp wrote: >> great link but where are the VHDL source files ? > on the project home page above that at in a zip file. > http://www.itee.uq.edu.au/~peters/xsvboard/index.html oh thanks again, I completely missed it :-/ > Peter Van Epp yg -- http://ygdes.com / http://yasep.org |