Schematic preferences
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From: MooseFET on 20 Jan 2010 09:10 On Jan 19, 7:30 pm, krw <k...(a)att.bizzzzzzzzzzz> wrote: > On Tue, 19 Jan 2010 18:15:25 -0800 (PST), MooseFET > > > > <kensm...(a)rahul.net> wrote: > >On Jan 19, 4:50 pm, krw <k...(a)att.bizzzzzzzzzzz> wrote: > > >[... schematics ...] > >> >> work fine. > > >> >Dots have lead to errors. If the reproduction of the schematic is > >> >less than perfect a mere fly spec can send the technician down a > >> >blind alley. > > >> I think that's more of an issue with hand-drawn schematics. I haven't > >> seen any problems (other than the damned software gets carried away > >> with dots) with CAD packages. > > >I often have to support things in remote sites. The schematic is in > >the > >manual and may be some what degraded. > > If your publisher is that bad, find a real professional. The degrading happens after it is published.
From: John Larkin on 20 Jan 2010 10:10 On Wed, 20 Jan 2010 00:50:40 -0800, Fred Abse <excretatauris(a)invalid.invalid> wrote: >On Mon, 18 Jan 2010 16:05:19 -0800, Jon Kirwan wrote: > >> I was trained at Tektronix for drafting electronics, so my >> preferences come from there. > >Do you do cowboys and tombstones? > >;-) I recall one doodle of a guy on a skis schussing down a Miller ramp. John
From: Joel Koltner on 20 Jan 2010 11:33 "krw" <krw(a)att.bizzzzzzzzzzz> wrote in message news:6vmcl55sa9plfqagp853v4knidqmc2tavh(a)4ax.com... > How do you define "MH" and it's connections? It's just a regular part that has one connection on it that -- on the schematic -- you connect to a ground symbol. All Pulsonix is doing is taking your part, replicating it six times, and connecting them all in parallel. Besides mounting holes, the common use for this is bypass caps... for the ones I want sprinkled around the board, I hook up a capacitor to +3.3V and ground (or whatever) and name the part C[1:20] -- poof!, 20 bypass caps. It's a small little feature, but I do prefer C[1:20] to 20 bypass caps all in a big string taking up mondo page real estate. ---Joel
From: Joel Koltner on 20 Jan 2010 11:41 One other note: While Pulsonix is "simple-minded" and just replicates and shorts the pins of all the replicants together when you use PART[m:n] reference designators, I was intrigued to learn that some packages take this notion even further: Microwave Office will let you place, e.g., U[1:5] and draw a wire from some pin on the IC to say, two resistors drawn in parallel, R[1:2], 1k and R[3:5], 2.2k. It then slaps down 5 ICs and 5 resistors on the board, hooking up 2 of the ICs to 1k resistors and the other 3 to 2.2k resistors. I suspect indiscrimnate use of such a feature can rapidly lead to schematics that are actually more confusing than helpful, but it was kinda interesting to see what at least some CAD tool designers are at least *thinking* about different ways to express connectivity. ---Joel
From: Joel Koltner on 20 Jan 2010 11:44
"krw" <krw(a)att.bizzzzzzzzzzz> wrote in message news:57ucl592esdgnir0r2afttvfu58e86nu3n(a)4ax.com... > You're still not probing the circuits so don't need all of the > information contained in the schematic. The logic guys haven't even > used schematics for thirty years. Before VHDL they used flow charts. (cough) Um, I knew a number of digital designers back in the '90s who used Xilinx's schematic capture tools to define their logic. Even in the '00s people still were, although by then I think there was a sense that you were a bit of a fossil if you hadn't switched over to VHDL, Verilog, or similar. |