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From: D Yuniskis on 19 Jan 2010 15:34 Hi Nico, Nico Coesel wrote: > D Yuniskis <not.going.to.be(a)seen.com> wrote: >> Of course, this is *highly* subjective -- but, I'd enjoy hearing >> folks' "conventions" used when preparing schematics (that *others* >> will consume -- how you scribble for your own purposes isn't >> important as it depends a lot on what *you* want out of the >> drawing). >> >> E.g., I *tend* to prefer landscape orientation -- though I >> drew a B size "portrait" this morning in lieu of a C size >> landscape. > > That depends on your printer. On a shitty printer A4/letter size may > be the maximum for a readable diagram while a good printer will allow > for much more on one page. I think, nowadays, its relatively easy to get 300 dpi. 600 dpi will quickly replace that. I never need to turn on 1200 dpi to get a quality drawing -- even on A size paper. Inkjet printers are probably *not* a good idea for schematics as they tend to have larger dot sizes. IMO, inkjet only makes sense for really low power and/or "color" (neither of which seem to be necessary -- IMO -- for producing schematics). I think pen plotters were in the 0.3mm region for line widths (rapidograph tip). If so, figure ~100 per inch (ignoring ink bleed). So, every three inches of plotter dimension corresponds to an inch of 300dpi printer dimension. I.e., an A size sheet has (roughly?) the same amount of "detail" as a C size sheet on the plotter. B size print would equate to a D size plot? I'll have to drag out a plotter and see. (or, has my mental arithmetic slipped a gear somewhere along this process?)
From: D Yuniskis on 19 Jan 2010 15:36 Hi Tim, Tim Wescott wrote: > On Mon, 18 Jan 2010 13:37:16 -0700, D Yuniskis wrote: > >> I try to include a block diagram of any "sizable" design early in the >> document. I try to draft the individual pages so that they roughly >> correspond with the blocks in that diagram. > > Having worked on a number of complex boards whose schematics run to a > dozen pages or more, I have developed a great liking for schematic > capture tools that do hierarchical schematics. You do the block diagram, > and then the tool _embodies_ the block diagram. Yes, even STRIDES was capable of this (1980's?). A shame those bozos fell on their face with that product! :< > (This, of course, like anything else*, can be misused. But done with a > minimum amount of care and some appropriately gleeful criticism from your > peers, it clarifies things a lot). > > * even commas. You mean, like, *asterisks*! ;-)
From: krw on 19 Jan 2010 18:33 On Tue, 19 Jan 2010 01:17:19 -0700, D Yuniskis <not.going.to.be(a)seen.com> wrote: >Hi John, > >John Fields wrote: >> On Mon, 18 Jan 2010 16:13:23 -0800, John Larkin >> >>> We use big (75 mils in PADS) dots. There's nothing wrong with a 4-way >>> connection if the dots are obvious. >> >> If one knows what's happening at that junction, that's fine, but it's >> happened more than once that a drafting droid saw two lines crossing and >> figured they should be connected. >> >> Resolving that ambiguity by breaking that "intersection" into two tees >> disappears the problem. > >That's how I used to draw things. But, I found it often resulted >in clumsy signal routing -- just to avoid a 4WS. I'm with you. For hand' drawn schematics maybe 4WS avoidance is a good thing. CAD does a much better job making things clearer. >I don't worry about people adding dots to *my* drawings. :> >The bigger worry I have is when schematics are reproduced >and it becomes difficult to determine if there is or isn't >a dot on the junction. That's why OrCrap makes 'em red. ;-)
From: krw on 19 Jan 2010 18:34 On Tue, 19 Jan 2010 10:20:09 -0500, Rich Webb <bbew.ar(a)mapson.nozirev.ten> wrote: >On Tue, 19 Jan 2010 08:44:38 -0600, John Fields ><jfields(a)austininstruments.com> wrote: > >>Even more reason to offset, since that way a 4 way intersection can >>_only_ be a crossover and if a wire butts up against another one it's a >>connection, dot or not. >> >>I think there's an ANSI standard that covers it, and probably an IEC one >>as well, but offhand I don't know which one(s) > >IIRC (my copy is at home) an appendix to AoE also makes this >recommendation. Of course, the Appeal to Authority isn't much of an >argument in and of itself. > >It does sometimes look more "natural" to connect at crossings (e.g., the >canonical voltage divider, top to bottom, with a signal passing >"through" the junction left to right) but adding a small jog there is a >small price to pay for the avoidance of ambiguity. A "T" always >connects; a crossing never connects. And no humpies. It's not a small price to pay, IMO. It really constricts flow on dense schematics.
From: Jim Thompson on 19 Jan 2010 19:00
On Tue, 19 Jan 2010 17:34:45 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote: >On Tue, 19 Jan 2010 10:20:09 -0500, Rich Webb ><bbew.ar(a)mapson.nozirev.ten> wrote: > >>On Tue, 19 Jan 2010 08:44:38 -0600, John Fields >><jfields(a)austininstruments.com> wrote: >> >>>Even more reason to offset, since that way a 4 way intersection can >>>_only_ be a crossover and if a wire butts up against another one it's a >>>connection, dot or not. >>> >>>I think there's an ANSI standard that covers it, and probably an IEC one >>>as well, but offhand I don't know which one(s) >> >>IIRC (my copy is at home) an appendix to AoE also makes this >>recommendation. Of course, the Appeal to Authority isn't much of an >>argument in and of itself. >> >>It does sometimes look more "natural" to connect at crossings (e.g., the >>canonical voltage divider, top to bottom, with a signal passing >>"through" the junction left to right) but adding a small jog there is a >>small price to pay for the avoidance of ambiguity. A "T" always >>connects; a crossing never connects. And no humpies. > >It's not a small price to pay, IMO. It really constricts flow on >dense schematics. I generally like at least 2 "grids" between junctions. If a schematic gets very dense I tend to make hierarchical "lumps" to keep it readable (*)... I like schematics to be readable enough that it's clear what the circuit does. (*) Also makes it easier for my layout guy. For instance, for tracking, I may have an array of series and paralleled resistors. I put them into a hierarchical block. On the main schematic you just see a block saying, for example, "VCO_ResistorArray_1". ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |