Schematic preferences [Design]

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From: John Fields on 19 Jan 2010 09:44

On Tue, 19 Jan 2010 01:17:19 -0700, D Yuniskis
<not.going.to.be(a)seen.com> wrote:

>Hi John,
>
>John Fields wrote:
>> On Mon, 18 Jan 2010 16:13:23 -0800, John Larkin
>>
>>> We use big (75 mils in PADS) dots. There's nothing wrong with a 4-way
>>> connection if the dots are obvious.
>>
>> If one knows what's happening at that junction, that's fine, but it's
>> happened more than once that a drafting droid saw two lines crossing and
>> figured they should be connected.
>>
>> Resolving that ambiguity by breaking that "intersection" into two tees
>> disappears the problem.
>
>That's how I used to draw things. But, I found it often resulted
>in clumsy signal routing -- just to avoid a 4WS.

---
I can't imagine why, since this: (View in Courier)

.. |
.. |
..----------o-----------
.. |
.. |

easily resolves to:

.. |
.. |
..----------o-o----------
.. |
.. |

or:

.. |
.. |
..----------o
.. |
.. o-----------
.. |
.. |

>I don't worry about people adding dots to *my* drawings. :>
>The bigger worry I have is when schematics are reproduced
>and it becomes difficult to determine if there is or isn't
>a dot on the junction.

---
Even more reason to offset, since that way a 4 way intersection can
_only_ be a crossover and if a wire butts up against another one it's a
connection, dot or not.

I think there's an ANSI standard that covers it, and probably an IEC one
as well, but offhand I don't know which one(s)

JF

From: Jim Thompson on 19 Jan 2010 09:47

On Mon, 18 Jan 2010 22:02:04 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote:

>On Mon, 18 Jan 2010 18:11:11 -0800, "Joel Koltner"
><zapwireDASHgroups(a)yahoo.com> wrote:
>
>>"krw" <krw(a)att.bizzzzzzzzzzz> wrote in message
>>news:la3al5t9bc0m40iav7app4hr03mqjne341(a)4ax.com...
>>> Negative active digital signals start with '/' or end in "_n" (leading
>>> "/netname" gets converted to "netname_n" in an FPGA)
>>
>>I prefer xSignalName, but I don't have any gripes about / or _n -- it's more
>>important that whatever standard someone chooses, that everyone else who then
>>works on the schematic adopts the same standard.
>
>...particularly in the same schematic.
>
>I really don't like prefixes (other than power) because the signal
>names don't collate properly. A net and its negative should sort
>together, just as diff pairs should sort together.

In PSpice Schematics...

Typing /SIGNALNAME/ shows on the schematic as an overbar.

In the netlist it appears as SIGNALNAMEbar

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

It's so cold the Democrats have their hands in their own pockets.

From: Rich Webb on 19 Jan 2010 10:20

On Tue, 19 Jan 2010 08:44:38 -0600, John Fields
<jfields(a)austininstruments.com> wrote:

>Even more reason to offset, since that way a 4 way intersection can
>_only_ be a crossover and if a wire butts up against another one it's a
>connection, dot or not.
>
>I think there's an ANSI standard that covers it, and probably an IEC one
>as well, but offhand I don't know which one(s)

IIRC (my copy is at home) an appendix to AoE also makes this
recommendation. Of course, the Appeal to Authority isn't much of an
argument in and of itself.

It does sometimes look more "natural" to connect at crossings (e.g., the
canonical voltage divider, top to bottom, with a signal passing
"through" the junction left to right) but adding a small jog there is a
small price to pay for the avoidance of ambiguity. A "T" always
connects; a crossing never connects. And no humpies.

--
Rich Webb Norfolk, VA

From: John Fields on 19 Jan 2010 10:42

On Tue, 19 Jan 2010 10:20:09 -0500, Rich Webb
<bbew.ar(a)mapson.nozirev.ten> wrote:

>On Tue, 19 Jan 2010 08:44:38 -0600, John Fields
><jfields(a)austininstruments.com> wrote:
>
>>Even more reason to offset, since that way a 4 way intersection can
>>_only_ be a crossover and if a wire butts up against another one it's a
>>connection, dot or not.
>>
>>I think there's an ANSI standard that covers it, and probably an IEC one
>>as well, but offhand I don't know which one(s)
>
>IIRC (my copy is at home) an appendix to AoE also makes this
>recommendation. Of course, the Appeal to Authority isn't much of an
>argument in and of itself.

---
Indeed, but when the reasons for the adoption of the standard lead to
the lessening of ambiguities and the elimination of errors, then
authority at least got that part right. ;)
---

>It does sometimes look more "natural" to connect at crossings (e.g., the
>canonical voltage divider, top to bottom, with a signal passing
>"through" the junction left to right) but adding a small jog there is a
>small price to pay for the avoidance of ambiguity. A "T" always
>connects; a crossing never connects. And no humpies.

---
Works for me! :-)

JF

From: Jon Kirwan on 19 Jan 2010 10:46

On Mon, 18 Jan 2010 23:12:55 -0600, "Tim Williams"
<tmoranwms(a)charter.net> wrote:

>Busing isn't useless though. I like to draw equal signals across, like this
>for instance:
>http://webpages.charter.net/dawill/Images/RegBO.gif

That is a _power_ supply. Sometimes, the signal _IS_ the
rail. However, that is still one I'd still draft somewhat
differently.

>The AC supply isn't the kind of thing you want wires hooked to globally, so
>I would hesitate to assign named connections to it.

I'm very much with you on that point.

>It's a small circuit,
>so it's not a big deal, and the buses stayed short. I could assign ground
>to the output side, but decided against it. That would avoid the ugly drop
>below the rectifier-filter,

It would probably help clarity.

>and maybe the IR LED connection could move somewhere.

It does seem to need a change. The +rail tie is back a
little from where it means more (closer to the 2N3906 which
diverts its current) and not more to the left of the 470 ohm
resistor which really isn't as related to what is happening
there. Plus having both lines crossing over the ground rail
line like that...

>Other than that, I think my only complaint is this drawing doesn't have a
>pleasing aspect ratio -- it's just too wide! The more primitive model isn't
>as balanced, but it does have a pleasing ratio:
>http://webpages.charter.net/dawill/Images/Regulated%20Blocking%20Oscillator.gif

I don't think I would decide that a schematic is better or
worse on the X vs Y size of the plot. Okay, if it is 10
pixels high and 50,000 wide I might question something there.
;) But it's not something I worry as much about as keeping
signal flow moving left to right, electron flow bottom to
top.

>This one is heavily bused:
>http://webpages.charter.net/dawill/tmoranwms/Circuits_2008/Triangle.gif
>I'm pretty sure I would draw it differently, but I may also retain the
>buses. It doesn't seem right to label them seperately; the circuit is
>closely connected, and yes, it is representative of the layout (which was
>breadboarded).

I'd definitely draw that differently.

>One more example, a larger one:
>http://webpages.charter.net/dawill/tmoranwms/Elec_Induction3.gif
>For its size, I broke up the building blocks, putting lots of white space
>between them. The components are fairly tightly spaced, as was my style at
>the time. Signals weren't cleanly bused, like how R315 and 316 aren't in
>line, that looks kind of weird. D308 is actually carrying a signal
>backwards, but it's only a little ways, towards a common node, so it's not
>too horrible. The supply lines are locally bused in some cases, and
>floating in others (IC301 south, R314, etc.), which looks kind of sloppy,
>maybe or maybe not worse than the alternative (studded with +V's just looks
>too redundant).
>
>Someone mentioned feedback paths can be reversed. Setting aside "I know
>what you mean", would this control circuit be acceptable to mirror, just
>because it's a feedback circuit? ;-) The obvious answer is, only if the
>rest of the loop dominates the circuit.

Let me add some really simple points.

>: +V15
>: |
>: ,-------+
>: | |
>: | \
>: | / R2
>: \ \
>: / R3 / C1
>: \ | ||
>: / +---||---OUT
>: | | ||
>: | |
>: C2| |/c Q1
>: || +-----|
>: IN---||---+ |>e
>: || | |
>: | |
>: \ |
>: / R4 |
>: \ \
>: / / R1
>: | \
>: | /
>: | |
>: +-------'
>: |
>: gnd
>:
>: FIGURE 1

This is a very basic, 1st year degenerative ac-coupled
voltage amplifier circuit. I don't like the way it is
diagrammed. Not because I can't instantly recognize it
today. But because I can remember what it looked like to me
when I was first looking at such things and trying to
understand them (I've never taken a single course on
electronics in my life -- not then, not since.)

At the time, I was looking at publications like Popular
Electronics back around the early 1970's. I would see the
wires going from the top of R3 to the top of R2 and would
incorrectly imagine there was some kind of signal there that
I didn't understand. It was only _later_, in one of those
random insights that sometimes dawns on one, that I suddenly
realized that a rail is a rail is a rail and that signal
doesn't happen there. Can't, one hopes most of the time.

Suddenly, I decided to redraw it this way:

>: +V15 +V15
>: | |
>: | |
>: | \
>: | / R2
>: \ \
>: / R3 / C1
>: \ | ||
>: / +---||---OUT
>: | | ||
>: | |
>: C2| |/c Q1
>: || +-----|
>: IN---||---+ |>e
>: || | |
>: | |
>: \ |
>: / R4 |
>: \ \
>: / / R1
>: | \
>: | /
>: | |
>: | |
>: gnd gnd
>:
>: FIGURE 2

Once I did that, the _wires_ no longer made me think about
signal. I could easily see that these were _fixed_ values
where I could _completely_ ignore the underlying "connection"
to the rest. It allowed me to isolate my thinking into much
smaller bits to analyze individually. And that was a very
sudden and very beneficial insight. Keep in mind I had no
one to talk to, no one to ask questions, no one to _give_ me
this insight. I had to find it on my own.

Once I started redrawing things according to this new rule, I
was in high cotton, indeed. Suddenly, circuits that had
seemed so far, far beyond me, were much more accessible.
Because I could divide and conquer and didn't need to go
tracing my fingers around.

Today, I have other reasons now, though. For example,

>: +V15
>: |
>: |
>: |
>: \
>: / R5
>: \
>: /
>: |
>: ,-------+-------/ /---------'
>: | |
>: | |
>: | \
>: | / R2
>: \ \
>: / R3 / C1
>: \ | ||
>: / +---||---OUT
>: | | ||
>: | |
>: C2| |/c Q1
>: || +-----|
>: IN---||---+ |>e
>: || | |
>: | |
>: \ |
>: / R4 |
>: \ \
>: / / R1
>: | \
>: | /
>: | |
>: | |
>: gnd gnd
>:
>: FIGURE 3

Assume that break in the line to R5 makes it so that R5 isn't
immediately visible on the sheet. There is much more
circuitry there and R5 is ... somewhere. Now I have to go
and trace that R2/R3 shared node around to find out if it
goes to a rail or something else, like R5. I shouldn't have
to do that, if it goes to a rail. That line might instead
have been bused over to a +15 voltage source, for all I can
tell, but I'd have to trace it out to find out, if so.\

It's just WRONG to do that. I take a second or two or three
more of my time. Besides that, the wires just lay all over
the place, distracting where they shouldn't when I'm tracing
some _other_ line. And I don't appreciate the waste of my
time for silly things that do NOT affect the meaning of what
is going on locally.

There are times when it is _important_ to bus a rail. But it
needs good justification on some important issue worth the
cost of readability.

Now you might argue with FIGURE 1 and my statement about
having to trace wires elsewhere, telling me that FIGURE 1
doesn't require that and any idiot needs go no further than
what they see right there to know exactly what is going on.
But if you say that, remember my own story when I was first
just starting to try and learn some electronics on my own and
my own confusion imagining that _every_ wire was meaningful
in some way to understanding what was going on; that signals
passed along all wires in some way that I needed to fathom.
Put yourself into those shoes for a moment, too. It's not
easy. Not even for me, trying to remember what it was like.
But I remember enough that I can recall the sudden kicking
myself in the head once it dawned on me. I know that it made
a difference to me then to redraw, in order to understand. A
BIG difference. Not small.

Jon