XST is driving me mad.
in [FPGA]
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From: ghelbig on 18 Jan 2010 21:28 I've been trying to make a _simple_ counter work, and it just doesn't. Can I get another set of eyes to look at this? It's probably something dumb/simple, but I just can't see it. The code: reg [3:0] DCM_Delay = 4'hF; reg DCM_Reset = 1'b1; always @ (posedge clk_fpga) begin if (reset) begin DCM_Reset <= 1'b1; DCM_Delay <= 4'hF; end else begin if (|DCM_Delay) begin DCM_Reset <= 1'b1; DCM_Delay <= DCM_Delay - 1; end else begin DCM_Reset <= 1'b0; end end end Comments: "reset" is the inversion of a push-button. I can bring it to a pin, and see that it is OK. I can put the DCM_Delay bus on pins - it's always high. I never see the counter count. What am I missing? I tried initialising DCM_Delay to all 0's to see if reset did anything - it seems to be ignored. I added 'reset' to the sensitivity list - that didn't help. What am I missing? Argh, Gary.
From: rickman on 19 Jan 2010 02:03 On Jan 18, 9:28 pm, ghelbig <ghel...(a)lycos.com> wrote: > I've been trying to make a _simple_ counter work, and it just doesn't. > > Can I get another set of eyes to look at this? It's probably > something dumb/simple, but I just can't see it. > > The code: > > reg [3:0] DCM_Delay = 4'hF; > reg DCM_Reset = 1'b1; > > always @ (posedge clk_fpga) begin > if (reset) begin > DCM_Reset <= 1'b1; > DCM_Delay <= 4'hF; > end else begin > if (|DCM_Delay) begin > DCM_Reset <= 1'b1; > DCM_Delay <= DCM_Delay - 1; > end else begin > DCM_Reset <= 1'b0; > end > end > end > > Comments: > > "reset" is the inversion of a push-button. I can bring it to a pin, > and see that it is OK. > > I can put the DCM_Delay bus on pins - it's always high. > > I never see the counter count. What am I missing? I tried > initialising DCM_Delay to all 0's to see if reset did anything - it > seems to be ignored. > > I added 'reset' to the sensitivity list - that didn't help. > > What am I missing? > > Argh, > Gary. Have you tried simulating this code? It sounds like you are trying to debug a chip. Isn't it easier to use a simulator where you can see every signal? I am not as familiar with Verilog, but you might try evaluating |DCM_Delay as a separate signal which can be viewed independently. I sometimes find brain cramps by being very deliberate and looking for problems where I "know" they don't exist. Rick
From: jmiles on 19 Jan 2010 02:50 On Jan 18, 6:28 pm, ghelbig <ghel...(a)lycos.com> wrote: > I've been trying to make a _simple_ counter work, and it just doesn't. > > Can I get another set of eyes to look at this? It's probably > something dumb/simple, but I just can't see it. > > The code: > > reg [3:0] DCM_Delay = 4'hF; > reg DCM_Reset = 1'b1; > > always @ (posedge clk_fpga) begin > if (reset) begin > DCM_Reset <= 1'b1; > DCM_Delay <= 4'hF; > end else begin > if (|DCM_Delay) begin > DCM_Reset <= 1'b1; > DCM_Delay <= DCM_Delay - 1; > end else begin > DCM_Reset <= 1'b0; > end > end > end > > Comments: > > "reset" is the inversion of a push-button. I can bring it to a pin, > and see that it is OK. > > I can put the DCM_Delay bus on pins - it's always high. > > I never see the counter count. What am I missing? I tried > initialising DCM_Delay to all 0's to see if reset did anything - it > seems to be ignored. > > I added 'reset' to the sensitivity list - that didn't help. > > What am I missing? > > Argh, > Gary. What character is in front of DCM_Delay in that if statement? -- john, KE5FX
From: Jonathan Bromley on 19 Jan 2010 03:20 On Mon, 18 Jan 2010 23:50:01 -0800 (PST), "jmiles(a)pop.net" wrote: >> � � � � �if (|DCM_Delay) begin >What character is in front of DCM_Delay in that if statement? I hope it's a vertical bar, the reduction-OR operator; that would make the test effectively "if (DCM_Delay != 0)" (which would have been more readable anyway). The code looks OK to me. The counter DCM_Delay should reset to 4'hf, count down to zero and then remain stuck at zero until the next reset. DCM_Reset should go to zero one clock after DCM_Delay reaches zero. Is there any chance that (a) the clock is not ticking, or (b) reset is stuck high? -- Jonathan Bromley
From: Gabor on 19 Jan 2010 09:01
On Jan 19, 3:20 am, Jonathan Bromley <jonathan.brom...(a)MYCOMPANY.com> wrote: > On Mon, 18 Jan 2010 23:50:01 -0800 (PST), "jmi...(a)pop.net" wrote: > >> if (|DCM_Delay) begin > >What character is in front of DCM_Delay in that if statement? > > I hope it's a vertical bar, the reduction-OR operator; > that would make the test effectively "if (DCM_Delay != 0)" > (which would have been more readable anyway). > > The code looks OK to me. The counter DCM_Delay should > reset to 4'hf, count down to zero and then remain stuck at > zero until the next reset. DCM_Reset should go to zero > one clock after DCM_Delay reaches zero. > > Is there any chance that (a) the clock is not ticking, or > (b) reset is stuck high? > -- > Jonathan Bromley or (c) the lights are inverted and DCM_Delay bits are really all zero? |