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From: Joerg on 12 Sep 2006 15:25 Hello Ulf, >>>so how do think other engineers design MSP430 products without this >>>info? Same problem with the AVR datasheets. Design by experimentation >> >>We generally don't anymore. We tried a design using an AVR's internal >>comparator. The next revision put it back in an external device. On the >>other hand the ADC has been adequate for a lot of purposes. Our general >>policy now is that any internal analog components on uCs should be >>presumed worthless until proven otherwise, especially considering the >>lack of adequate specifications. We suspect they let the digital guys >>build them for fun or something. :) > > No, the designers doing the analog stuff for the AVR is separated from the > digital designers > by a significant ground plane it is so large that some people call it the > "Baltic Sea". ... Does "Baltic Sea" imply that AVRs are designed in Viking country, like MSP430s were really born in Teutonia (or rather Bavaria)? > The truth is that you cannot expect to have the same analog capabilites in a > a CMOS process suitable to do all the other nice things you want in a micro. Not necessarily. We have done mixed signal ASIC (full custom) with serious logic functionality on board. These include front end amps that feature a noise figure close to discrete solutions and up to 30MHz. Just look at the analog tricks you can perform with a CD4007UBE (full CMOS) or a 74HCU04 (also full CMOS). The main thing is to consult with analog people before a SoC approach is chosen. That's not happening IMHO so we analog guys end up doing designs discrete that could have been uC. Over and over. Sometimes it helps to communicate before a chip design and not after. Example: IMHO the decision by TI to take the ADC function out of the new HW-multiplier equipped F2xxx device was not a good decision. It'll cost design-wins. -- Regards, Joerg http://www.analogconsultants.com
From: Jim Granville on 12 Sep 2006 15:56 Joerg wrote: > Hello Terran, > > >>> so how do think other engineers design MSP430 products without this >>> info? Same problem with the AVR datasheets. Design by experimentation >> >> >> We generally don't anymore. We tried a design using an AVR's internal >> comparator. The next revision put it back in an external device. On the >> other hand the ADC has been adequate for a lot of purposes. Our general >> policy now is that any internal analog components on uCs should be >> presumed worthless until proven otherwise, especially considering the >> lack of adequate specifications. We suspect they let the digital guys >> build them for fun or something. :) > > > Sometimes it looks like it. It is also a reason why I never used SoC. > Even a puny 10c opamp can often run circles around what's in there. > Whenever I looked at the "analog" offerings in uC or SoC devices I > couldn't resist the urge to yawn. Then did the whole design analog, like > usual. Ended up being lower in cost anyways. Yes, it certainly pays to look for Analog performance from the companies that cut their teeth on analog, and added a uC, and not vice-versa. So, TI, Analog Devices, and SiLabs offer 24 bit ADCs and well spec'd 12 bit ADCs, and their Comparators are Rail-Rail, on their uC. I know an AVR user whose ADC performance measurably degraded on a generation upgrade [90S -> mega]. Tip: if you NEED ADC performance, and the spec sheet has empty MAX columns, or no supply range or Temp range included, just pause and think "why do they leave off that info ?" -jg
From: Joerg on 12 Sep 2006 16:00 Hello John, > >>Or to modify an old saying in sales: If you don't find the lowest >>cost >>solution somebody else will. > > Yep. so true! > >>>>Anything >>>>other than a top-down architecture with a thorough FRS and version >>>>control isn't going to fly in the long run and would raise a red >>>>flag >>>>with FDA and agencies like that. >>> >>>Top down is a weird thing. I hold it as: Never jmp to a position >>>outside a procedure. If I jump upwards I usually explain why and >>>where the jump will end and briefly what is done there. >>> >>In med electronics you often don't have much of a choice. The design >>process is pretty much prescribed. > > I know. It's a pitty. It's necessary, but still a pitty :-) > I got used to it and like it. The prescribed methods (usually) make sense and can prevent people from cutting corners. >> >>In those days it was pounding the Horner scheme and finding the >>solution where the multiplier coefficients would have the least >>amount of zeros, counting the number of clock cycles needed for the >>remaining shifts and adds, finding it still doesn't fit, letting off >>a cuss word or two, doing some more Horner scheme scribbling, >>cussing >>some more... >>Come to think of it, for very cost sensitive gear it's still the >>same. >>TI did announce the 430F2350 which finally will have a HW >>multiplier. > > I'm not really convinced about that. I mean, that's some part you > could take out of a DSP design and plug it into a regular ?C... I > guess there won't be a lot of need for it in the "real" world :-) It > will ease things a bit. So much for sure. > For most uCs you can't use DSP solutions and plug them in. Too slow. Having or not having a HW multiplier is a huge difference. > >>No pricing yet. Sigh. But: They took out the ADC! Arrrrgh.... This >>leaves only the old 430F427 but that's too expensive for most of my >>apps. > > I must admit that I'm just getting used to the 430 , not done much > with it yet but what I know already it's one of the best on the market > for what I usually need. > It's a great series. A bit high on the pricing scale though and sometimes you get a new useful feature but they toss out another. This has already prevented two MSP430 design-ins here. -- Regards, Joerg http://www.analogconsultants.com
From: steve on 12 Sep 2006 16:35 Joerg wrote: > Some of them actually do. They check out the performance themselves. I wouldn't think that is possible by using one or several samples, don't you have to know about the chip manufacturing process variations to characterize the performance of a part made 6 months from now? Individual parts sometimes perform way better (and I mean like an order of magnitude better) then the max worse case specifications. I > mostly work in med electronics where we just cannot do that. So, no spec > means no design-in. same here > > -- > Regards, Joerg > > http://www.analogconsultants.com
From: steve on 12 Sep 2006 16:37
Joerg wrote: > Sometimes it helps to communicate before a chip design and not after. > Example: IMHO the decision by TI to take the ADC function out of the new > HW-multiplier equipped F2xxx device was not a good decision. It'll cost > design-wins. I'm not aware of these new HW multiplier F2 parts, is there a link somewhere with the announcement? |