Formula for minimum drive current for mosfet
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From: gearhead on 13 Apr 2008 14:51 On Apr 12, 2:26 pm, "Jon Slaughter" <Jon_Slaugh...(a)Hotmail.com> wrote: > "gearhead" <nos...(a)billburg.com> wrote in message > > news:7e10d5cc-4430-45df-8654-c9ace3961ffa(a)x41g2000hsb.googlegroups.com... > On Apr 10, 4:44 pm, Fred Bloggs <nos...(a)nospam.com> wrote: > > > > > > > bill.slo...(a)ieee.org wrote: > > > On 11 apr, 01:33, "Jon Slaughter" <Jon_Slaugh...(a)Hotmail.com> wrote: > > > >>Whats the formula? > > > >>I = 1/2*F*Q*V? > > > >>Trying to figure out if I can drive > > > >>http://www.fairchildsemi.com/pf/FD/FDD8424H.html > > > >>with a uC directly? (I think it can supply up to 20mA or so) > > > >>V = 12V if I use pullup and 5V if not. > > > > Check out the data sheet. Figure 7 shows the typical gate charge > > > required to get the gate voltage up to a level where the part is > > > turned on - something like 10nC. The worst case total gate charge > > > listed earlier in the data sheet is 24uC. > > > > 20mA s going to take 1.2usec to deliver that 24uC of charge - this is > > > slow switching by MOSFET standards, and you won't want to switch that > > > slowly very often, because if you do there is a real risk that the > > > switch will overheat. > > > > -- > > > Bill Sloman, Nijmegen > > > That thing looks like a cross conduction hazard and half at that > > switching speed, both FETs come on at less than 2V from their source > > rails, wonder if he's tying the gates together, definitely would want to > > switch as fast as possible then...- Hide quoted text - > > > - Show quoted text - > > Jon, the problem is the amount of time it takes the mosfet(s) to > > transition from on to off and back from off to on again. During each > > switching action of a mosfet it acts like a resistor for the > > duration. Heat! So you want the duration of each switching event as > > short as possible, regardless of whether these events occur at 100Hz > > or 100kHz. > > Its not so simple. I do see that now as I stated in the last post I made. I > thought when they said frequency they meant something else and not the > switchign time. (although you do make it much clearer than they did) > > But I cannot switch at any frequency and have as fast a transition as I > want. I must drive the gates of the mosfet with BJT's and, of course, they > have there own limits. > > > But that's only part of the problem. Fred brings up a good point > > about cross-conduction. > > Now, when your drive has the gates pulled all the way to the rail > > (either one), that's no problem. > > But it IS a problem during the switching transition, because both > > mosfets are partly turned on providing a path -- not through the load, > > but directly across the power rails. You don't want slow switching > > here. > > Yes, I know.. its basically just like CMOS(I guess it is CMOS) and there is > a short between tranistions. > > But there are a few solutions. One is to switch the mosfets on sequentially > instead of at the same time. Al I loose is a bit of power to the motor > momentarily but inertia should smooth it out. (basically delay the PWM a bit > until the transition of the first fet is finished) > > But you do make a good point. The problem is, I do have limitations. I do > see bill's point now about using a uC to drive the fets as its probably just > way to low. Ultimately I'd like a formula for drive. (is it a simple RC > circuit(Approximately) or more?) > > > So a weak drive is bad. > > For motor drive, a kilohertz is probably way plenty, and this lower > > frequency is better so that you don't put your mosfets in the hot seat > > so often. > > Well, I do understand that(and its more clear now that you said it). The > thing about that slow of a frequency, from what I've read, is that its > audiable(Which may or may not be an issue depending on how loud it is). > > Basically I need to maximize transition time and minimize frequency given > all the contraints. (> 20khz(probably), surge current by drivers(bjt's), > least power dissipation(Although I guess as long as its below max I'm ok)).. > > Ok, I guess I see the confusion. The subject is minimum drive current for > mosfets. I guess this is bad. I shouldn't require a minimum but a maxium > within the mosfet drivers specs. (basically what I wanted was a formula to > see the relationship) > > What I plan on doing is use bjt's to drive the gates in emitter follower.... > but I need to configure them for optimal conditions. (max drive current but > within device specs) > > Anyways, thanks for the post. Its more clear now but I need to let it settle > in. (I "knew" all the concepts before but there was just no glue tieing them > together ;/) > > (Although I'd still like to drive them with the uC if possible because that > is the simplest method... sure it might not be most efficient but if I'm > still able to get reasonble power dissipation then its not *wrong* but just > not optimal) > > Thanks, > Jon- Hide quoted text - > > - Show quoted text - As for the question of what frequency to use, you don't need a formula. You have set a minimum of 20 kHz because it would make noise below that. Going higher will just dissipate more power, so use 20kHz. If you find the uC is not enough and you have to use a driver chip, consider using a "high-low" or "half bridge" driver for two n-channel devices instead of the fairchild dual p and n. There are lots of such drivers available, and many incorporate deadtime to prevent cross- conduction. The only such chip I ever used was the IR2153, but you should look for the best one for your application. Besides avoiding the cross-conduction thing, you'll get more bang for the buck from n-channel mosfets. Here are a couple of links to those drivers. http://search.digikey.com/scripts/DkSearch/dksus.dll?Cat=2556632 http://search.digikey.com/scripts/DkSearch/dksus.dll?Cat=2556427
From: Paul E. Schoen on 13 Apr 2008 16:24 "Fred Bloggs" <nospam(a)nospam.com> wrote in message news:4801FE22.2040705(a)nospam.com... > > > Paul E. Schoen wrote: > >> probably a good idea to have some sort of limiting resistor. I tried a >> simpler driver with an NPN and PNP with bases tied together as the input >> and emitters tied together as the output, with collectors across a 12 >> volt supply, and somehow there was simultaneous conduction and one of >> the transistors popped. > > I just don't see how that's possible unless your input drive was so > blindingly fast and there were enough parasitics to avalanche a BE > junction at a transition. Ordinarily there can be no crossconduction when > the forward BE voltage on the one transistor is a cut-off reverse BE bias > for the other... > >> Probably because they were not well matched. So here's a circuit you can >> try: >> >> Paul > > > What in the world is all that, and why all that gate capacitance: [snip LTspice] This developed from my problems with a fairly simple boost converter using a UC1843a driving a fairly large MOSFET. The FQP24N08 I originally used seemed to get too hot, and I thought it might be the 0.06 ohm RdsOn, so I used a beast MOSFET HUF75645 with 0.014 ohms. It drew more primary current and got hotter, so I assumed it was slow transition of drive voltage because of the 3800 pF gate capacitance, so I added a driver, and that seemed to fix it. Then I tried some ideas for a simple gate driver, and it became not so simple. But the LTspice simulations did not show that much higher dissipation with fairly slow transitions (up to about 1 uSec), which I was simulating with high values of series resistance and gate capacitance. I don't have exact models of the two transistors I used. I'm still a bit stumped as to why the UC1843a doesn't work well enough for the FQP24N08. I tried the simple NPN/PNP emitter follower gate driver because it seemed to work OK in LTspice, and it would be cheap and simple to add to the circuit. But the simulation was with 2N3904 and 2N3906, while I used an MPSA06 and an MJE170 (which I have lots of). The drive signal was directly from the gate driver of the UC1843a, which has a rise/fall time of 50 nSec into 1000 pF, and probably 10 nSec into just the bases, so it was probably fast enough to cause cross-conduction, especially with the mismatch of the transistors. Probably it would have been OK with a 20 ohm limiting resistor and a 10 nF capacitor as a supply, or maybe by adding base resistance. The LTSpice ASC for the simple driver follows: Paul ================================================================== Version 4 SHEET 1 1172 680 WIRE -32 -144 -192 -144 WIRE 384 -144 -32 -144 WIRE 768 -144 384 -144 WIRE 384 -48 384 -144 WIRE -192 0 -192 -144 WIRE 320 0 224 0 WIRE 768 0 768 -64 WIRE 832 0 768 0 WIRE -32 16 -32 -144 WIRE 384 80 384 48 WIRE 480 80 384 80 WIRE 512 80 480 80 WIRE 640 80 640 -16 WIRE 640 80 592 80 WIRE 656 80 640 80 WIRE 720 80 656 80 WIRE 384 112 384 80 WIRE -80 160 -112 160 WIRE 0 160 -80 160 WIRE 224 160 224 0 WIRE 224 160 80 160 WIRE 320 160 320 0 WIRE 656 160 656 80 WIRE -192 304 -192 80 WIRE -112 304 -112 240 WIRE -112 304 -192 304 WIRE -32 304 -32 80 WIRE -32 304 -112 304 WIRE 224 304 -32 304 WIRE 384 304 384 208 WIRE 384 304 224 304 WIRE 656 304 656 224 WIRE 656 304 384 304 WIRE 768 304 768 96 WIRE 768 304 656 304 WIRE 224 320 224 304 FLAG 224 320 0 FLAG 832 0 Vsw FLAG 640 -16 Vg FLAG -80 160 Vin FLAG 480 80 Vdrv SYMBOL voltage -112 144 R0 WINDOW 0 37 59 Left 0 WINDOW 3 -109 182 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 12 10u 10n 10n 5u 10u 1000) SYMBOL pnp 320 208 M180 WINDOW 0 49 26 Left 0 WINDOW 3 38 52 Left 0 SYMATTR InstName Q2 SYMATTR Value 2N4403 SYMBOL res 96 144 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value 10 SYMBOL res 496 96 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName R5 SYMATTR Value 1 SYMBOL voltage -192 -16 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 15 SYMBOL nmos 720 0 R0 SYMATTR InstName M1 SYMATTR Value STB120NF10 SYMBOL res 752 -160 R0 SYMATTR InstName R6 SYMATTR Value 2 SYMBOL npn 320 -48 R0 SYMATTR InstName Q3 SYMATTR Value 2N3904 SYMBOL cap -48 16 R0 SYMATTR InstName C2 SYMATTR Value 1� SYMBOL cap 640 160 R0 SYMATTR InstName C3 SYMATTR Value 3800p TEXT -224 504 Left 0 !.tran 1m startup
From: Jon Slaughter on 13 Apr 2008 17:27 Ok, I finally found the equations. All my calculations say that the switching power is negliable compared to the power dissipated by R_ON. (Only at high frequencies does it start becoming significant) P = I^2*R + 2*a*V*I*t*F which can be rewritten as P = I^2*R + 2*a*V*Q*F and a depends on the load type(1/2 for inductive and 1/6 for resistive) So infact for my case I need only like 200mA to switch the load fast enough for 50khz(so like 99% of the square waveform is constant).
From: miso on 14 Apr 2008 01:13 On Apr 13, 12:40 am, "Paul E. Schoen" <pst...(a)smart.net> wrote: > "gearhead" <nos...(a)billburg.com> wrote in message > > news:be00fe5b-5dc3-420f-8f1b-07643cb42a5a(a)e39g2000hsf.googlegroups.com... > On Apr 12, 7:54 pm, "Paul E. Schoen" <pst...(a)smart.net> wrote:> <m...(a)sushi.com> wrote in message > > >news:3e667771-ed64-4a9e-a065-ced0e13f718f(a)k1g2000prb.googlegroups.com... > > > On Apr 12, 1:33 pm, "Jon Slaughter" <Jon_Slaugh...(a)Hotmail.com> wrote: > > >> BTW, this should point to an optimal switching frequency for least > > >> power > > >> dissipation? Anyone know the formula? > > (snip) > > > > If your intent is to drive directly from the uP, you may want to > > > consider how the load switching will effect the uP. You will probably > > > get ground bounce. In addition, as you increase VGS, there will be > > > current flow from CDG. If the drain voltage is falling like a rock, it > > > will generate current that opposes your gate drive. What I'm leading > > > to here is you should probably buffer the uP from the power fet. > > > I just finished looking into various MOSFET gate drivers for my design. > > (snip) > > > I also played around with a homebrew MOSFET driver using an NPN and PNP > > transistor, and a few resistors and diodes, and it seemed to work pretty > > well in the simulator. I also set it up with a bootstrap to the MOSFET > > drain, with the idea that maybe a driver could be built into a MOSFET, > > but > > it's probably better to tie the voltage supply for the driver to a 5 volt > > or 12 volt supply. So you can omit some of this circuitry, but it is > > probably a good idea to have some sort of limiting resistor. I tried a > > simpler driver with an NPN and PNP with bases tied together as the input > > and emitters tied together as the output, with collectors across a 12 > > volt > > supply, and somehow there was simultaneous conduction and one of the > > transistors popped.> Paul > > Did you use a resistors in each base, or just tie them together? > > > > I just tied them together. It's basically two emitter followers. They > should never be both on at the same time, but if one is slower than the > other, I guess it can happen, and did. The simulation looked OK. > > Paul There is charge storage in the base, so you get cross conduction if switched fast.
From: Paul E. Schoen on 14 Apr 2008 02:02
"Jon Slaughter" <Jon_Slaughter(a)Hotmail.com> wrote in message news:51uMj.5721$GE1.3620(a)nlpi061.nbdc.sbc.com... > Ok, I finally found the equations. All my calculations say that the > switching power is negliable compared to the power dissipated by R_ON. > (Only at high frequencies does it start becoming significant) > > P = I^2*R + 2*a*V*I*t*F > > which can be rewritten as > > P = I^2*R + 2*a*V*Q*F > > and a depends on the load type(1/2 for inductive and 1/6 for resistive) > > So infact for my case I need only like 200mA to switch the load fast > enough for 50khz(so like 99% of the square waveform is constant). The datasheet for the National LM5022 has a good discussion of the various losses for a switching regulator, which can also be applied to your case. I modified their formulas for a more generalized case. Conduction losses are determined by RdsOn as: Pc = D * ( Id^2 * RdsOn * 1.3 ) where D is duty cycle, Id is RMS drain current during conduction, and the 1.3 factor is for heating effect on RdsOn. Switching losses are: Psw = 0.5 * Vg * Id * fsw * (tr + tf) , where Vg is gate voltage, Id is drain current, tr is rise time, tf is fall time, and fsw is switching frequency. I found that, at 100 kHz, with a 42 watt load, switching loss can be as high as 2.3 watts even with a 6 amp driver with an FQP90N08, and about 0.43 watts with a 0.5 amp driver with STP35NF10, and 1.3 watts with a 0.2 amp driver. A lot depends on the actual switching time of the MOSFET. I was surprised that the FQP90N08 has 730 nSec rise and 330 nSec fall, so even a 0.5 amp driver only brings the losses up to 3 watts. The conduction losses are usually more than Psw, but not always. I made an Excel spreadsheet that calculates various losses for a typical boost regulator. It may not be perfect, but it gives a pretty good idea, I think. LTspice is probably better, but this is faster. You are welcome to try it: www.smart.net/~pstech/MOSFET_Losses.xls Good luck, Paul |