Schematic preferences
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From: Joel Koltner on 18 Jan 2010 20:45 "krw" <krw(a)att.bizzzzzzzzzzz> wrote in message news:ksu9l5p7mcno37k0ovic7a43f69vugviqi(a)4ax.com... > I end up printing his > on 11x17 and squinting. ;-) You might find that your printer supports so-called Super-B-sized paper at 13"x19"... it's a worthwhile step up from 11"x17", IMO. One thing that hasn't been mentioned is the size of the stock library symbols suppled with the schematic capture program: Even though most people end up drawing their own symbols anyway, the size of the supplied symbols tends to set a precedent for the relative scale of various symbols. In my experience, ORCAD goes for relatively larger symbols -- an ORCAD D-sized sheet sheet often prints out without too much squinting necessary at 13"x19", whereas in many other schematic capture programs it'd be pretty much unusable. > I put the RefID on top of the value with the value inside the > component if it fits. Do you use the European convention of drawing resistors as rectangular boxes then? Or you mean just on bigger items like ICs? > Diagree. It's very handy to have our XLR connectors look like XLR > connectors, in the proper orientation. Although you have to be careful that people don't mirror the symbol on you. :-) (With multi-pin connectors, sometimes the hook-ups are a lot cleaner if you go ahead and mirror the symbol, so it's a subjective call if you should make a rule that symbols drawn to resemble the physical part should never be mirrored or not.) > BNCs are drawn big-circle little > circle/dot (dots=male, circles=female). I put a small gap in the outer circle so that it doesn't appear as though you're shorting the inner conductor to the shield. I usually give power rails and ground different colors (e.g., +5V in red, ground in green). This was prompted by early versions of Pulsonix that made it *way* too easy to accidentally end up with an isolated sub-net (e.g., a net between an IC pin and a resistor) that was connected-by-name to ground or a power rail (long story, but suffice to say that in more recent versions it's now almost impossible to do this accidentally), so it provided some immediate visible feedback if you were shooting yourself in the foot in such a manner. I liked the effect, though, and hence have kept doing it, adding now, e.g., purple to indicate 50ohm traces. (These are all just net attributes so it's easy to change colors or display everything in all black again if someone prefers.) Do you use PADS for layout? If so, do you use a 3rd party tool such as Prescience to pass design constriants between ORCAD and PADS? ---Joel
From: krw on 18 Jan 2010 20:49 On Mon, 18 Jan 2010 13:37:16 -0700, D Yuniskis <not.going.to.be(a)seen.com> wrote: >Hi, > >Of course, this is *highly* subjective -- but, I'd enjoy hearing >folks' "conventions" used when preparing schematics (that *others* >will consume -- how you scribble for your own purposes isn't >important as it depends a lot on what *you* want out of the >drawing). <snipped stuff already answered> Let me add net-naming conventions to the discussion: All voltages (nothing else) get a '+' or '-' prefix. Negative active digital signals start with '/' or end in "_n" (leading "/netname" gets converted to "netname_n" in an FPGA) Differential pairs get a '+' or '-' suffix (so they collate properly). I like BiCapitalization for words, and Under_Scores to note hierarchy. e.g. ChanA_OutputGain. This also allows netlists to be collated properly. Hmm, dinnertime.
From: krw on 18 Jan 2010 20:59 On Mon, 18 Jan 2010 17:45:19 -0800, "Joel Koltner" <zapwireDASHgroups(a)yahoo.com> wrote: >"krw" <krw(a)att.bizzzzzzzzzzz> wrote in message >news:ksu9l5p7mcno37k0ovic7a43f69vugviqi(a)4ax.com... >> I end up printing his >> on 11x17 and squinting. ;-) > >You might find that your printer supports so-called Super-B-sized paper at >13"x19"... it's a worthwhile step up from 11"x17", IMO. It supports 24" x 1-roll. It's an HP DesignJet. ;-) 13" doesn't fit in a notebook. >One thing that hasn't been mentioned is the size of the stock library symbols >suppled with the schematic capture program: Even though most people end up >drawing their own symbols anyway, the size of the supplied symbols tends to >set a precedent for the relative scale of various symbols. In my experience, >ORCAD goes for relatively larger symbols -- an ORCAD D-sized sheet sheet often >prints out without too much squinting necessary at 13"x19", whereas in many >other schematic capture programs it'd be pretty much unusable. Orcrap's symbols are *huge*. I draw my own. >> I put the RefID on top of the value with the value inside the >> component if it fits. > >Do you use the European convention of drawing resistors as rectangular boxes >then? Or you mean just on bigger items like ICs? No, resistors are squiggles. Just the bigger items. When I first started in IBM, everything was a box. A resistor looked exactly like a capacitor, like an AND gate, and a DFF. Schematics had to be drawn on chain printers. Didn't like it much. ;-) >> Diagree. It's very handy to have our XLR connectors look like XLR >> connectors, in the proper orientation. > >Although you have to be careful that people don't mirror the symbol on you. >:-) (With multi-pin connectors, sometimes the hook-ups are a lot cleaner if >you go ahead and mirror the symbol, so it's a subjective call if you should >make a rule that symbols drawn to resemble the physical part should never be >mirrored or not.) Whether or not it's mirrored depends on which side of the connector you're looking at. ;-) Point taken. >> BNCs are drawn big-circle little >> circle/dot (dots=male, circles=female). > >I put a small gap in the outer circle so that it doesn't appear as though >you're shorting the inner conductor to the shield. Works for me. It still looks like what it is (perhaps without the tangs). >I usually give power rails and ground different colors (e.g., +5V in red, >ground in green). This was prompted by early versions of Pulsonix that made >it *way* too easy to accidentally end up with an isolated sub-net (e.g., a net >between an IC pin and a resistor) that was connected-by-name to ground or a >power rail (long story, but suffice to say that in more recent versions it's >now almost impossible to do this accidentally), so it provided some immediate >visible feedback if you were shooting yourself in the foot in such a manner. >I liked the effect, though, and hence have kept doing it, adding now, e.g., >purple to indicate 50ohm traces. (These are all just net attributes so it's >easy to change colors or display everything in all black again if someone >prefers.) I just put global connectors on the pins, or as close as possible. A global power pin might connect a dozen pins on a processor. >Do you use PADS for layout? If so, do you use a 3rd party tool such as >Prescience to pass design constriants between ORCAD and PADS? I don't do layout. The layout guy uses Allegro. The other hardware engineer uses Layout, when he does layout (only legacy products anymore).
From: Jon Kirwan on 18 Jan 2010 21:03 On Mon, 18 Jan 2010 16:26:51 -0800, John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >On Mon, 18 Jan 2010 16:05:19 -0800, Jon Kirwan ><jonk(a)infinitefactors.org> wrote: > >>On Mon, 18 Jan 2010 13:37:16 -0700, D Yuniskis >><not.going.to.be(a)seen.com> wrote: >> >>>Of course, this is *highly* subjective -- but, I'd enjoy hearing >>>folks' "conventions" used when preparing schematics (that *others* >>>will consume -- how you scribble for your own purposes isn't >>>important as it depends a lot on what *you* want out of the >>>drawing). >>><snip> >> >>I was trained at Tektronix for drafting electronics, so my >>preferences come from there. >> >>>Aside from "general power", all signals that span pages *must* >>>come to the edge of the page. I don't like hunting for signals >>>in the middle of a page even if there is a grid reference to help >>>me locate it. It's just easier to conceptualize: "OK, this is >>>used elsewhere" or "This comes from someplace else" so I >>>know when something I am interested in involves other sheets. >>><snip> >> >>Let me state the following rules used at Tek: >> >>(1) Unless clearly justifiable for other reasons, electron >>flow from bottom of page upwards to the top. All parts >>oriented so that this is obvious. (No BJT spun around to >>make electron flow go otherwise, unless I can _justify_ >>clearly why it reads better.) > >PNP emitters up, NPN emitters down! > >John Yes. Maintain the flow direction uniformly. Some exceptions, but it's a good rule. Jon
From: Joel Koltner on 18 Jan 2010 21:11
"krw" <krw(a)att.bizzzzzzzzzzz> wrote in message news:la3al5t9bc0m40iav7app4hr03mqjne341(a)4ax.com... > Negative active digital signals start with '/' or end in "_n" (leading > "/netname" gets converted to "netname_n" in an FPGA) I prefer xSignalName, but I don't have any gripes about / or _n -- it's more important that whatever standard someone chooses, that everyone else who then works on the schematic adopts the same standard. |