From: Nial Stewart on 10 Mar 2010 04:49 > Ok, but when I'm debugging, I often need to look at intermediate > signals to see where the problem is coming from. It would be great to > not have to rerun the simulation to do that. There is more than once > that I added some signals only to find that the problem took a > slightly different curve than the one I expected and I have to add > more signals. In the end I may have to run the simulation 10 or more > times before I see the problem. Aye, this wouldn't be uncommon if I'm tracing a fault in a reasonably complex design. It's a big selling point for Aldec if you don't need to re-run a sim to add more signals. I have had a few simulations that take 10 minutes to get to the point I'm interested in so this could have saved a _lot_ of time. How much is an Active HDL license (�GBP) approx ? Nial.
From: Jonathan Bromley on 10 Mar 2010 04:55 On Wed, 10 Mar 2010 09:49:28 -0000, "Nial Stewart" wrote: >> Ok, but when I'm debugging, I often need to look at intermediate >> signals to see where the problem is coming from. It would be great to >> not have to rerun the simulation to do that. There is more than once >> that I added some signals only to find that the problem took a >> slightly different curve than the one I expected and I have to add >> more signals. In the end I may have to run the simulation 10 or more >> times before I see the problem. > >Aye, this wouldn't be uncommon if I'm tracing a fault in a reasonably >complex design. ModelSim lets you do this too - it costs disk space and simulation speed, of course, but may still be worth it for tough debug: log -r /* Now *everything* goes in the waveform log file, and you can add any signal you want to the waveform retrospectively. >It's a big selling point for Aldec if you don't need to re-run a sim to >add more signals. I have had a few simulations that take 10 minutes to >get to the point I'm interested in so this could have saved a _lot_ of >time. Yup. The log does introduce an overhead, but it's unlikely to be worse than a factor of 2 or 3, so likely to be a win if you initially don't know where to start looking. -- Jonathan Bromley (not connected with Mentor, but does use ModelSim quite a lot)
From: Nial Stewart on 10 Mar 2010 05:20 > ModelSim lets you do this too I need a smiley for a red face :-0 I started using Modelsim 15 odd years ago and am still using it in the same way I 'picked it up'. I have often wondered if I'm missing out on productivity enhancements. > - it costs disk space and > simulation speed, of course, but may still be worth it for > tough debug: > > log -r /* > > Now *everything* goes in the waveform log file, and > you can add any signal you want to the waveform retrospectively. > >>It's a big selling point for Aldec if you don't need to re-run a sim to >>add more signals. I have had a few simulations that take 10 minutes to >>get to the point I'm interested in so this could have saved a _lot_ of >>time. > > Yup. The log does introduce an overhead, but it's unlikely to be > worse than a factor of 2 or 3, so likely to be a win if you > initially don't know where to start looking. Even debug of small modules usually takes a few iterations so this might be a useful 'default' simulation style when using the GUI for fault tracing. I presume for smaller designs the overhead is negligable and it's more likely to pay off for bigger designs. Thanks Jonathan. (Perhaps I should RTFM). Nial.
From: Jonathan Bromley on 10 Mar 2010 06:09 On Wed, 10 Mar 2010 10:20:15 -0000, "Nial Stewart" wrote: >(Perhaps I should RTFM). Nah. That would spoil all the fun, thrill of the chase, etc, etc. Anyhow, there's just too much of it. Try this entertaining little experiment. 1) Open a vanilla Tcl shell (if you have Tcl installed). Ask it how many commands it knows about: llength [info commands] The answer is about 86, depending on version. 2) Try the same in ModelSim's Tcl console. Be very, very afraid. -- Jonathan Bromley
From: Alan Fitch on 10 Mar 2010 06:49 Nial Stewart wrote: >> ModelSim lets you do this too > > I need a smiley for a red face > > :-0 > > I started using Modelsim 15 odd years ago and am still using it in > the same way I 'picked it up'. I have often wondered if I'm > missing out on productivity enhancements. > > >> - it costs disk space and >> simulation speed, of course, but may still be worth it for >> tough debug: >> >> log -r /* >> >> Now *everything* goes in the waveform log file, and >> you can add any signal you want to the waveform retrospectively. >> I had a quick look in aldec, and it has a command log -r * According to the help this is a synonym for trace -r * There are also various settings on the Trace/Debugging tab to do with how Aldec preserves the signals you've added to the wavefrom window, regards Alan <snip> > > (Perhaps I should RTFM). > That's what I did :-; -- Alan Fitch Senior Consultant Doulos � Developing Design Know-how VHDL * Verilog * SystemVerilog * SystemC * PSL * Perl * Tcl/Tk * Project Services Doulos Ltd. Church Hatch, 22 Marketing Place, Ringwood, Hampshire, BH24 1AW, UK Tel: + 44 (0)1425 471223 Email: alan.fitch(a)doulos.com Fax: +44 (0)1425 471573 http://www.doulos.com ------------------------------------------------------------------------ This message may contain personal views which are not the views of Doulos, unless specifically stated.
First
|
Prev
|
Next
|
Last
Pages: 1 2 3 4 Prev: Call for papers: HPCS-10, USA, July 2010 Next: Why doesn't this situation generate a latch? |