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From: jjlindula on 20 Jan 2010 10:46
On Jan 18, 2:50 am, Charles Gardiner <inva...(a)invalid.invalid> wrote:
> > Thanks everyone for your input. My question is relating to the cost of
> > a simulator that supports SystemVerilog Verfication, just how much
> > should I expect to spend for one license? If its too expensive I'll
> > have to stick with sytem testbenches.
>
> > joe
>
> To put a ball park on it, about the price of a relatively well-equiped
> medium range car ;). If you get a great deal from Aldec / Cadence /
> Mentor / Synopsys, maybe the price of a well equiped small car.

Why is it so expensive?
From: fpgabuilder on 25 Jan 2010 15:39
On Jan 20, 7:46 am, "jjlind...(a)hotmail.com" <jjlind...(a)hotmail.com>
wrote:
> On Jan 18, 2:50 am, Charles Gardiner <inva...(a)invalid.invalid> wrote:
>
> > > Thanks everyone for your input. My question is relating to the cost of
> > > a simulator that supports SystemVerilog Verfication, just how much
> > > should I expect to spend for one license? If its too expensive I'll
> > > have to stick with sytem testbenches.
>
> > > joe
>
> > To put a ball park on it, about the price of a relatively well-equiped
> > medium range car ;). If you get a great deal from Aldec / Cadence /
> > Mentor / Synopsys, maybe the price of a well equiped small car.
>
> Why is it so expensive?

Not sure! But I was completely blown away at how much discounts are
offered if you just ask for them... the car analogy really applies
here. Even better would be a "used car"... i.e. you bargain as if you
are out to buy a used car. Nevertheless, if you want a cheap tool to
learn Aldec Riviera Pro may be a good deal as well... ofcourse, here
you pay to debug Riviera for Aldec.
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