Tabula. (FPGA start up)
in [FPGA]
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From: Jonathan Bromley on 5 Mar 2010 03:32 On Fri, 05 Mar 2010 00:29:51 +0000, Symon wrote: >> time they ship product. Successful startups usually have something >> that is *many* times better than the existing products, on some axis >> almost entirely orthogonal to the prior metrics. > >Mate, >Ever wonder if you've been doing this too long? Did you write that last >phrase with a straight face? Aw, c'mon, don't give us a hard time. Sometimes we're so exposed to that kind of MBA-speak that a bit of it leaks into our heads unbidden. At least Eric didn't talk about "crossing the chasm" (squirm). -- Jonathan Bromley
From: Symon on 5 Mar 2010 05:20 On 3/5/2010 8:32 AM, Jonathan Bromley wrote: > On Fri, 05 Mar 2010 00:29:51 +0000, Symon wrote: > >>> time they ship product. Successful startups usually have something >>> that is *many* times better than the existing products, on some axis >>> almost entirely orthogonal to the prior metrics. >> >> Mate, >> Ever wonder if you've been doing this too long? Did you write that last >> phrase with a straight face? > > Aw, c'mon, don't give us a hard time. Sometimes we're so > exposed to that kind of MBA-speak that a bit of it leaks > into our heads unbidden. > > At least Eric didn't talk about "crossing the chasm" (squirm). I forgot the smiley, sorry! I hope I've not upset the FPGA community? :-) I particularly chuckled at 'almost entirely'. A bit like 'nearly unique', or '82% pregnant'. I wonder if a lot of small companies are stymied by the legal stuff surrounding patent law. It seems the big boys patent anything and everything, whether it's novel and innovative or not, and then use the lawyers to kill anyone who tries to compete. Here's a recent example:- http://www.theregister.co.uk/2010/03/03/apple_htc_google/ I wonder if there should be some kind of vexatious litigant law, or a SLAPP type law. I guess that's why these patent cases are never heard in California which seems to have fairly sensible legislation in this area. My iPhone has designed in California on it, why are Apple suing HTC in Delaware? Cheers, Syms.
From: Raymund Hofmann on 5 Mar 2010 07:48 On 2 Mrz., 22:28, -jg <jim.granvi...(a)gmail.com> wrote: > On Mar 3, 12:22 am, Symon <symon_bre...(a)hotmail.com> wrote: > meanwhile, over in the other corners, anyone remember Triscend ? I do. I tried to use their Arm7 part. I gave up after i discovered their P&R software Fastchip entirely written in Java still sucked after giving it a new machine with lots of memory and processing power. But at that time a Arm7 MCU alone was quite interesting...
From: rickman on 5 Mar 2010 12:32 On Mar 4, 7:29 pm, Symon <symon_bre...(a)hotmail.com> wrote: > On 3/4/2010 12:46 PM, Eric Smith wrote: > > > time they ship product. Successful startups usually have something > > that is *many* times better than the existing products, on some axis > > almost entirely orthogonal to the prior metrics. > > > Eric > > Mate, > Ever wonder if you've been doing this too long? Did you write that last > phrase with a straight face? > Cheers, Syms. Yeah, the funny thing is I understood it AND missed the inside joke entirely! Rick
From: Jon Elson on 8 Mar 2010 13:25
-jg wrote: > On Mar 3, 12:22 am, Symon <symon_bre...(a)hotmail.com> wrote: >> This lot seems to be revealing a bit more about their stuff. >> >> http://www.mercurynews.com/breaking-news/ci_14493616 >> > > A better overview is here > http://www.eetasia.com/ART_8800599499_499495_NT_b33fb563_2.HTM > > Some of what Tabula say, reads more like a patent dance, than any > technical explanation. > > So, it is locally 1.6GHz, with time-sliced threads. > It might save Logic and routing, but it will have no config-memory > saving, and it ADDS the complexity of > rapid config multiplex. (not to mention power impacts) > Yeah. If you have a very linear procedure to perform, a processor (CPU) can save an enormous amount of hardware, but at a severe time penalty. But, the basic idea is kind of the same, share hardware and do the task in smaller pieces, sequentially. maybe this Tabula concept is trying to make a finer-grain move in that direction. > We already have Achronix climing 1.5GHz PLDs since 2008, and XMOS > have 400-500Mhz hard-time-sliced cores shipping also. > This sounds more interesting, and may be a more solid shift in technology. > Tabula have some rather quaint terminology, as they try to spin what > they do, but designers have always tried to do more serially & > pipeline, to save resource, if they can. > > It seems their SW will do the 'thread slice & dice' for you, and that > may be the critical point. > > If that works, and you can debug it, it could be useful. If it fails, > it will fail in a tangle. Definitely. I don't understand what they are trying to do well enough to even know how hard this will be, but the debugging does sound quite messy. Also, I suspect there are a variety of tasks where the Tabula would be so totally a poor fit. I make a line of products that have multiple quadrature encoder counters in FPGAs. I've been thinking that due to the digital filtering of the inputs that is required, I could time multiplex the logic of these counters pretty easily and save a bunch of space. The filtering runs at 1 MHz! But, I could just as easily figure out how to do this in the HDL of my choice, with just a little thinking. Jon |