core memory
in [Design]
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From: Jan Panteltje on 5 Dec 2009 17:24 On a sunny day (Sat, 5 Dec 2009 21:18:35 -0000) it happened "Andrew Holme" <ah(a)nospam.co.uk> wrote in <L6ASm.76416$Pi.70738(a)newsfe30.ams2>: > >"ChrisQ" <meru(a)devnull.com> wrote in message >news:qmySm.123940$yM2.60574(a)newsfe10.ams2... >> Jan Panteltje wrote: >>> On a sunny day (Sat, 05 Dec 2009 10:51:36 -0800) it happened John Larkin >>> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote in >>> <kqalh59i8jsogn1t6p3ghuaop5c137qtoj(a)4ax.com>: >>> >>>> Testing some FTP stuff, threw up some test files... >>>> >>>> ftp://jjlarkin.lmi.net/Core_304bits.jpg >>> >>> 16 bits x 19?? >>> >>> >>>> ftp://jjlarkin.lmi.net/Core_4K.jpg >>> >>> Amazing.. >>> >>> >>>> ftp://jjlarkin.lmi.net/Core_4Kdetail.jpg >>> >>> Must have been expensive. >>> >>> >>>> John >>>> >>>> >>>> >> >> Don't recognise either of those as to manufacturer, but the last machine >> that I had with core was an early pdp11/05, which eventually got shipped >> back to the us. >> >> Ok, quiz time: how does core memory work ?. (and no cheating via google >> etc :-)... >> >> Regards, >> >> Chris > >The cores have hysteresis. You can't flip the direction of magnetisation >unless the current in the wires exceeds a certain threshold. You put half >the required current down an X wire and half down a Y wire. Only one core >at the X,Y intersection gets flipped. > >When you flip a core, you get a pulse induced in the read wire. This means >you have to do a destructive read. If you write a 1 and get a big pulse >back then you know it must have been a 0 before. If it was already a 1, you >only get a tiny pulse. Every read must be followed by a write to restore >the previous state. > >See my core memory page for 'scope captures of actual read pulses: > >http://www.holmea.demon.co.uk/Core/Flipper.htm Cool!
From: Spehro Pefhany on 5 Dec 2009 18:33 On Sat, 05 Dec 2009 14:05:33 -0800, the renowned John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >On Sat, 05 Dec 2009 13:33:53 -0800, Joerg <invalid(a)invalid.invalid> >wrote: > >>John Larkin wrote: >>> Testing some FTP stuff, threw up some test files... >>> >>> ftp://jjlarkin.lmi.net/Core_304bits.jpg >>> >>> ftp://jjlarkin.lmi.net/Core_4K.jpg >>> >>> ftp://jjlarkin.lmi.net/Core_4Kdetail.jpg >>> >> >>Here I must confess that I cruelly re-purposed some of those. People >>made matrix keyboards with them because the hysteresis provided an easy >>way to avoid contact bounce (you had to reset the cores before the next >>keystroke was accepted). So, snip, snip, snip, clicker, clicker, into a >>bag and gave them away. Back in the 70's keyboards with German layout >>were very expensive, some had odd interfaces, and buying 30-40 push >>button switches was a lot cheaper. You could buy them with a step and >>then glue a label onto the lower step. I think they still make them. > >There were some jukeboxes that used core memory - BIG cores, one per >record - to remember which records had been selected/paid for to play. > >John I vaguely remember a nuke simulator that used cores about 1" in diameter. Best regards, Spehro Pefhany -- "it's the network..." "The Journey is the reward" speff(a)interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com
From: Paul Keinanen on 5 Dec 2009 18:29 On Sat, 05 Dec 2009 19:03:54 GMT, Jan Panteltje <pNaonStpealmtje(a)yahoo.com> wrote: >On a sunny day (Sat, 05 Dec 2009 10:51:36 -0800) it happened John Larkin ><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote in ><kqalh59i8jsogn1t6p3ghuaop5c137qtoj(a)4ax.com>: > >>Testing some FTP stuff, threw up some test files... >> >>ftp://jjlarkin.lmi.net/Core_304bits.jpg > >16 bits x 19?? More likely 16 words x 18bit+parity. Apparently some control store of some sequencer. >>ftp://jjlarkin.lmi.net/Core_4K.jpg > >Amazing.. That is just a bit plane. > > >>ftp://jjlarkin.lmi.net/Core_4Kdetail.jpg > >Must have been expensive. Apparently not, since core memory was used until the introduction of 16 Kid DRAM chips. Intel even used 8 Kid (partially faulty 16 Kid) chips to allow the physical PDP-11 memory expansion to the huge 4 MiD. Due to the bus length limitations, only 1 MiD could be used with core, while the semiconductor memory allowed the full 4 MiD to be used.
From: John Larkin on 5 Dec 2009 18:39 On Sun, 06 Dec 2009 01:29:30 +0200, Paul Keinanen <keinanen(a)sci.fi> wrote: >On Sat, 05 Dec 2009 19:03:54 GMT, Jan Panteltje ><pNaonStpealmtje(a)yahoo.com> wrote: > >>On a sunny day (Sat, 05 Dec 2009 10:51:36 -0800) it happened John Larkin >><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote in >><kqalh59i8jsogn1t6p3ghuaop5c137qtoj(a)4ax.com>: >> >>>Testing some FTP stuff, threw up some test files... >>> >>>ftp://jjlarkin.lmi.net/Core_304bits.jpg >> >>16 bits x 19?? > >More likely 16 words x 18bit+parity. >Apparently some control store of some sequencer. > > >>>ftp://jjlarkin.lmi.net/Core_4K.jpg >> >>Amazing.. > >That is just a bit plane. > >> >> >>>ftp://jjlarkin.lmi.net/Core_4Kdetail.jpg >> >>Must have been expensive. > >Apparently not, since core memory was used until the introduction of >16 Kid DRAM chips. > >Intel even used 8 Kid (partially faulty 16 Kid) chips to allow the >physical PDP-11 memory expansion to the huge 4 MiD. Due to the bus >length limitations, only 1 MiD could be used with core, while the >semiconductor memory allowed the full 4 MiD to be used. > I recall that an additional 4Kx16 core for a PDP-11/20 was about $4000. John
From: Don Lancaster on 5 Dec 2009 19:10
Jan Panteltje wrote: > On a sunny day (Sat, 05 Dec 2009 10:51:36 -0800) it happened John Larkin > <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote in > <kqalh59i8jsogn1t6p3ghuaop5c137qtoj(a)4ax.com>: > >> Testing some FTP stuff, threw up some test files... >> >> ftp://jjlarkin.lmi.net/Core_304bits.jpg > > 16 bits x 19?? > > >> ftp://jjlarkin.lmi.net/Core_4K.jpg > > Amazing.. > > >> ftp://jjlarkin.lmi.net/Core_4Kdetail.jpg > > Must have been expensive. > > >> John >> >> >> Cheapest core ever got was a nickel a bit, less drivers and read circuitry. -- Many thanks, Don Lancaster voice phone: (928)428-4073 Synergetics 3860 West First Street Box 809 Thatcher, AZ 85552 rss: http://www.tinaja.com/whtnu.xml email: don(a)tinaja.com Please visit my GURU's LAIR web site at http://www.tinaja.com |