Freq. Independent Phase Shifter
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From: George Herold on 13 May 2010 22:43 On May 13, 4:52 pm, John Larkin <jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: > On Thu, 13 May 2010 12:26:36 -0700 (PDT), George Herold > > > > > > <gher...(a)teachspin.com> wrote: > >On May 13, 10:48 am, John Fields <jfie...(a)austininstruments.com> > >wrote: > >> On Wed, 12 May 2010 20:51:37 -0700 (PDT), George Herold > > >> <gher...(a)teachspin.com> wrote: > >> >PS > >> >Seems like DDS beats it all. > > >> --- > >> What does direct digital synthesis have to do with generating two sine > >> waves 120 degrees apart over a range of frequencies? > > >Hmm, Can't you just have a simple offset from two look up tables. Run > >them off the same clock and change the clock rate to change > >frequency. Some one already posted that I thought? > > One can stick an N-bit binary adder (N being the same as the counter > width) to add a phase shift to one path, and use the same lookup table > contents, or share a single table. That way you don't have to reload > the table to change the phase shift. If you stuff M into the adder, > the phase shift is 360 * M/N degrees. > > That works for both the binary counter and for the DDS accumulator > versions. > > John- Hide quoted text - > > - Show quoted text - Thanks John that makes it easier. George H.
From: George Herold on 13 May 2010 22:46 On May 13, 8:07 pm, John Fields <jfie...(a)austininstruments.com> wrote: > On Thu, 13 May 2010 14:15:50 -0700, John Larkin > > > > > > <jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: > >On Thu, 13 May 2010 09:48:53 -0500, John Fields > ><jfie...(a)austininstruments.com> wrote: > > >>On Wed, 12 May 2010 20:51:37 -0700 (PDT), George Herold > >><gher...(a)teachspin.com> wrote: > > >>>PS > >>>Seems like DDS beats it all. > > >>--- > >>What does direct digital synthesis have to do with generating two sine > >>waves 120 degrees apart over a range of frequencies? > > >Once you have the DDS logic set up, it's really easy to stick an adder > >into one of the address paths and add a 0 to 359.999... degree > >variable phase shift. A small FPGA and a couple of DACs can make a > >nice generator with huge frequency range/resolution and pretty > >impressive amplitude and phase control. > > --- > Indeed. > > My quarrel was with "DDS" being used as something other than the > mechanism used to generate the variable clock from a fixed frequency > source.- Hide quoted text - > > - Show quoted text - Ahh, I wasn't quite sure what your 'quarrel' was. Would you have been happier if I'd just said digital techniques? George H.
From: John Larkin on 13 May 2010 22:54 On Thu, 13 May 2010 19:43:24 -0700 (PDT), George Herold <gherold(a)teachspin.com> wrote: >On May 13, 4:52�pm, John Larkin ><jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: >> On Thu, 13 May 2010 12:26:36 -0700 (PDT), George Herold >> >> >> >> >> >> <gher...(a)teachspin.com> wrote: >> >On May 13, 10:48�am, John Fields <jfie...(a)austininstruments.com> >> >wrote: >> >> On Wed, 12 May 2010 20:51:37 -0700 (PDT), George Herold >> >> >> <gher...(a)teachspin.com> wrote: >> >> >PS >> >> >Seems like DDS beats it all. >> >> >> --- >> >> What does direct digital synthesis have to do with generating two sine >> >> waves 120 degrees apart over a range of frequencies? >> >> >Hmm, Can't you just have a simple offset from two look up tables. �Run >> >them off the same clock and change the clock rate to change >> >frequency. �Some one already posted that I thought? >> >> One can stick an N-bit binary adder (N being the same as the counter >> width) to add a phase shift to one path, and use the same lookup table >> contents, or share a single table. That way you don't have to reload >> the table to change the phase shift. If you stuff M into the adder, >> the phase shift is 360 * M/N degrees. >> >> That works for both the binary counter and for the DDS accumulator >> versions. >> >> John- Hide quoted text - >> >> - Show quoted text - > >Thanks John that makes it easier. > >George H. Oops, the phase shift should be 360 * M / (2^N) of course. As the DAC output frequency approaches Nyquist, the DAC waveform looks perfectly awful, all steppy and squirmy and random-noisy looking. It's hard to believe that something's not broken. After the lowpass filter, it's a beautiful steady sine wave. John
From: Winston on 13 May 2010 23:52 On 5/13/2010 6:57 PM, John Larkin wrote: (...) > Not exactly. If you address the sine lookup table with a > fixed-frequency-clocked phase accumulator, instead of a counter, you > can tune the sine frequency to as fine a resolution as you want, just > by using more bits in the accumulator. (...) So the Phase Accumulator itself is a state machine which creates a binary version of the next point to be output predicated on the previous point and the frequency control word. It is starting to soak in. Thanks! --Winston
From: John Larkin on 14 May 2010 00:24
On Thu, 13 May 2010 20:52:25 -0700, Winston <Winston(a)bigbrother.net> wrote: >On 5/13/2010 6:57 PM, John Larkin wrote: > >(...) > >> Not exactly. If you address the sine lookup table with a >> fixed-frequency-clocked phase accumulator, instead of a counter, you >> can tune the sine frequency to as fine a resolution as you want, just >> by using more bits in the accumulator. > >(...) > >So the Phase Accumulator itself is a state machine which creates >a binary version of the next point to be output predicated on >the previous point and the frequency control word. > >It is starting to soak in. Thanks! > >--Winston > I guess. Imagine a 32-bit clockable binary register, just 32 D-type flipflops. Call the value in the register R. Every clock, add a 32-bit value F to it. so At every clock R = R + F F is our 32-bit frequency set register. If R=1, it will take 2^32 clocks for R to make a full cycle back to where it started. If R=2, it will cycle around in 2^31 clocks. Take the 12 most significant bits of the R register and use them to address a sinewave lookup table, and use the result to load a DAC at the same clock rate. What's cool is that you can put all sorts of values into F, and the frequency of the DAC is proportional to the value F. For small values of F, it will take many clocks before you bump the upper 12 bits and advance one location in the lookup table. As F gets bigger, you'll start hopping around the table in bigger jumps, skipping some entries. But if you lowpass filter the DAC output, you always get a sine wave. The frequency-set resolution is Fclk/2^32, which is pretty fine. If you use a 64-bit register, resolution is Fclk/2^64. It's really very simple, an easy to build in an FPGA. John |