Freq. Independent Phase Shifter
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From: John Larkin on 14 May 2010 19:17 On Fri, 14 May 2010 17:57:02 -0500, "krw(a)att.bizzzzzzzzzzzz" <krw(a)att.bizzzzzzzzzzzz> wrote: >On Thu, 13 May 2010 21:24:27 -0700, John Larkin ><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: > >>On Thu, 13 May 2010 20:52:25 -0700, Winston <Winston(a)bigbrother.net> >>wrote: >> >>>On 5/13/2010 6:57 PM, John Larkin wrote: >>> >>>(...) >>> >>>> Not exactly. If you address the sine lookup table with a >>>> fixed-frequency-clocked phase accumulator, instead of a counter, you >>>> can tune the sine frequency to as fine a resolution as you want, just >>>> by using more bits in the accumulator. >>> >>>(...) >>> >>>So the Phase Accumulator itself is a state machine which creates >>>a binary version of the next point to be output predicated on >>>the previous point and the frequency control word. >>> >>>It is starting to soak in. Thanks! >>> >>>--Winston >>> >> >>I guess. >> >>Imagine a 32-bit clockable binary register, just 32 D-type flipflops. >>Call the value in the register R. Every clock, add a 32-bit value F to >>it. so >> >>At every clock >> >> R = R + F >> >>F is our 32-bit frequency set register. >> >>If R=1, it will take 2^32 clocks for R to make a full cycle back to >>where it started. If R=2, it will cycle around in 2^31 clocks. >> >>Take the 12 most significant bits of the R register and use them to >>address a sinewave lookup table, and use the result to load a DAC at >>the same clock rate. >> >>What's cool is that you can put all sorts of values into F, and the >>frequency of the DAC is proportional to the value F. For small values >>of F, it will take many clocks before you bump the upper 12 bits and >>advance one location in the lookup table. As F gets bigger, you'll >>start hopping around the table in bigger jumps, skipping some entries. >>But if you lowpass filter the DAC output, you always get a sine wave. >>The frequency-set resolution is Fclk/2^32, which is pretty fine. If >>you use a 64-bit register, resolution is Fclk/2^64. >> >>It's really very simple, an easy to build in an FPGA. > >That's pretty much what I did for a CCD shutter motor controller for a high >def color camera a couple of years ago. The accumulator drove three lookups >to drive the three-phase motor outputs. In normal mode the thing ran open >loop with the 'F' register setting the RPM. An optical encoder was used to >sense position (and RPM). During start-up and if the motor wasn't where it >should be (acceleration needed), the 'F' register was set to the encoder value >(position) plus a constant until the RPM hit a threshold. Didn't take much of >a Virtex-4. Timing wasn't hard to meet either. ;-) > This is fun stuff. The 3-phase dac outputs (or sine/cos) can drive stepper motor windings and get beautifully smooth motion. Come to think of it, 3 phase will probably microstep nicer than quadrature, since it won't have flat spots like many 2-phase stepper motors do. All the classroom signals-and-systems stuff gets very real when you roll your own DDS. John
From: krw on 14 May 2010 20:10
On Fri, 14 May 2010 16:17:11 -0700, John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >On Fri, 14 May 2010 17:57:02 -0500, "krw(a)att.bizzzzzzzzzzzz" ><krw(a)att.bizzzzzzzzzzzz> wrote: > >>On Thu, 13 May 2010 21:24:27 -0700, John Larkin >><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >> >>>On Thu, 13 May 2010 20:52:25 -0700, Winston <Winston(a)bigbrother.net> >>>wrote: >>> >>>>On 5/13/2010 6:57 PM, John Larkin wrote: >>>> >>>>(...) >>>> >>>>> Not exactly. If you address the sine lookup table with a >>>>> fixed-frequency-clocked phase accumulator, instead of a counter, you >>>>> can tune the sine frequency to as fine a resolution as you want, just >>>>> by using more bits in the accumulator. >>>> >>>>(...) >>>> >>>>So the Phase Accumulator itself is a state machine which creates >>>>a binary version of the next point to be output predicated on >>>>the previous point and the frequency control word. >>>> >>>>It is starting to soak in. Thanks! >>>> >>>>--Winston >>>> >>> >>>I guess. >>> >>>Imagine a 32-bit clockable binary register, just 32 D-type flipflops. >>>Call the value in the register R. Every clock, add a 32-bit value F to >>>it. so >>> >>>At every clock >>> >>> R = R + F >>> >>>F is our 32-bit frequency set register. >>> >>>If R=1, it will take 2^32 clocks for R to make a full cycle back to >>>where it started. If R=2, it will cycle around in 2^31 clocks. >>> >>>Take the 12 most significant bits of the R register and use them to >>>address a sinewave lookup table, and use the result to load a DAC at >>>the same clock rate. >>> >>>What's cool is that you can put all sorts of values into F, and the >>>frequency of the DAC is proportional to the value F. For small values >>>of F, it will take many clocks before you bump the upper 12 bits and >>>advance one location in the lookup table. As F gets bigger, you'll >>>start hopping around the table in bigger jumps, skipping some entries. >>>But if you lowpass filter the DAC output, you always get a sine wave. >>>The frequency-set resolution is Fclk/2^32, which is pretty fine. If >>>you use a 64-bit register, resolution is Fclk/2^64. >>> >>>It's really very simple, an easy to build in an FPGA. >> >>That's pretty much what I did for a CCD shutter motor controller for a high >>def color camera a couple of years ago. The accumulator drove three lookups >>to drive the three-phase motor outputs. In normal mode the thing ran open >>loop with the 'F' register setting the RPM. An optical encoder was used to >>sense position (and RPM). During start-up and if the motor wasn't where it >>should be (acceleration needed), the 'F' register was set to the encoder value >>(position) plus a constant until the RPM hit a threshold. Didn't take much of >>a Virtex-4. Timing wasn't hard to meet either. ;-) >> > >This is fun stuff. The 3-phase dac outputs (or sine/cos) can drive >stepper motor windings and get beautifully smooth motion. Come to >think of it, 3 phase will probably microstep nicer than quadrature, >since it won't have flat spots like many 2-phase stepper motors do. It was a three-phase motor. This part of the system wasn't my responsibility but the engineer assigned to it was totally clueless. I was a contractor, so no problem. I volunteered to help him (ended up doing the work) since I was working by the hour. ;-) You're right, it was fun stuff. >All the classroom signals-and-systems stuff gets very real when you >roll your own DDS. |