divide by 25/16
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From: colin on 14 Aug 2006 20:42 "Jim Thompson" <To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> wrote in message news:6052e2lg1duih2391sklki2cvijr7j963f(a)4ax.com... > On Mon, 14 Aug 2006 20:18:13 -0400, John Popelish <jpopelish(a)rica.net> > wrote: > > >colin wrote: > >> "John Popelish" <jpopelish(a)rica.net> wrote in message > >> news:yLCdnS-F2clLlHzZnZ2dnUVZ_r6dnZ2d(a)adelphia.com... > >> > >>>How about dividing by a symmetrical output factor of 25 (1.875 MHz > >>>output), and then use a rather modest pll to multiply that frequency > >>>by 16. > >> > >> > >> Although that would give the right output, it would limit the input range by > >> the range of the vco and is probably a bit more complicated, idealy i just > >> want to lose 9 out of every 25 input pulses, hopefully with just a few logic > >> ics. > >> > >> preferably not to lose all nine one after the other but thats just me being > >> a perfectionist. > > > >I wonder if the 7497 is available in a fast enough logic family. > >http://www-s.ti.com/sc/ds/sn7497.pdf > > I was going to suggest rate multipliers but you beat me to it. > > You might have to roll your own out of PECL. Ah yes rate multipliers, I never realy studied their internal circuit much till now, they always seemed confusing. the 7497 doesnt seem to be available in any flavour, digikey has some cmos 4000 ones. how hard can it be to just lose 9 out of 25 pulses. 50mhz shld be doable with the higher speed 74 cmos families I think. Colin =^.^=
From: Ken Smith on 14 Aug 2006 20:50 In article <n37Eg.27268$ts3.10238(a)newsfe2-gui.ntli.net>, colin <no.spam.for.me(a)ntlworld.com> wrote: >Hi, >I need a circuit to divide a <50mhz digital signal by 25/16. >ie. i need to lose 9 out of every 25 pulses. >Is there a simple/standard way to do this ? This will fit into a 22V10 so you can do it with one chip if you want. The dinner bell just rang. I'll be back with something not using programable parts after dinner. -- -- kensmith(a)rahul.net forging knowledge
From: colin on 14 Aug 2006 20:55 "Ken Smith" <kensmith(a)green.rahul.net> wrote in message news:ebr5ph$gn$2(a)blue.rahul.net... > In article <n37Eg.27268$ts3.10238(a)newsfe2-gui.ntli.net>, > colin <no.spam.for.me(a)ntlworld.com> wrote: > >Hi, > >I need a circuit to divide a <50mhz digital signal by 25/16. > >ie. i need to lose 9 out of every 25 pulses. > >Is there a simple/standard way to do this ? > > This will fit into a 22V10 so you can do it with one chip if you want. > > The dinner bell just rang. I'll be back with something not using > programable parts after dinner. > heh cool enjoy dinner ! ive managed it so far with a divide by 16 counter and a D type flipflop but also quite a lot of gates of different types. maybe I can minimise those down to use just a couple of quad gate chips. Colin =^.^=
From: budgie on 14 Aug 2006 21:14 On Mon, 14 Aug 2006 22:46:43 GMT, "colin" <no.spam.for.me(a)ntlworld.com> wrote: >Hi, >I need a circuit to divide a <50mhz digital signal by 25/16. >ie. i need to lose 9 out of every 25 pulses. >Is there a simple/standard way to do this ? > >Ive come up with a few ideas that use quite a lot of logic, >such as a divide the input by 25 with 1-25 decoder wich then swallows a >pulse at the apropriate count. > >or divide by 16 on the output wich swallows a pulse every other count and >also at terminal count. >but it runs into trouble becuse it swallows its own clock pulses and doesnt >advance. > >or invert the clock input to a flip flop with an xor from its output, wich >gives a nice looking pulse train >but needs a few more pulses taken out. > >Its to go after a 3ghz divide by 64 prescaler so the combined divide is 100. Most swallow systems result in an irregular output waveform, which may or may not create downstream issues (such as unwanted sidebands/spurs). I suspect you have created a problem by your choice of /64. Can you not source some other prescaler? If not, you are probably looking at two cascaded dual modulus divide by 4/5 stages, and I'm not aware of any integrated 4/5 devices.
From: James Waldby on 14 Aug 2006 21:15
colin wrote: .... > I need a circuit to divide a <50mhz digital signal by 25/16. > ie. i need to lose 9 out of every 25 pulses. .... As 25/16 = (5/4)^2, if you follow a 5/4 divider by another one, you'll have 25/16. -jiw |