divide by 25/16
in [Design]
|
Prev: potentiometer
Next: supercapacitors
From: colin on 14 Aug 2006 22:47 "Ken Smith" <kensmith(a)green.rahul.net> wrote in message news:ebrbdp$7sh$1(a)blue.rahul.net... > In article <ebr5ph$gn$2(a)blue.rahul.net>, > Ken Smith <kensmith(a)green.rahul.net> wrote: > >In article <n37Eg.27268$ts3.10238(a)newsfe2-gui.ntli.net>, > >colin <no.spam.for.me(a)ntlworld.com> wrote: > >>Hi, > >>I need a circuit to divide a <50mhz digital signal by 25/16. > >>ie. i need to lose 9 out of every 25 pulses. > >>Is there a simple/standard way to do this ? > > > >This will fit into a 22V10 so you can do it with one chip if you want. > > > >The dinner bell just rang. I'll be back with something not using > >programable parts after dinner. > > Ok I'm back from dinner :> > > > If you write out the numbers from 0 to 25 in base 5, you will discover > that the lower digit is odd 10 times. Just looking at the LSB of the > counter, you could skip 10 clock pulses. > > When the upper digit is 4, you could allow one clock for one of the odd > numbers > > > LSB A -------------------------! \ > !NAND >------- Allow clock > B --------------! \ --! / > !NAND >-- > C -- -----! / > ! > .. etc .. ! > ! > MSB H--------- > aha yes that would do, many thanks, shld be able to do in 2 chips a 74'390 dual decade counter and a 74'00. I had written down the numbers in base 5, and had a big page of possible sequences looking for easy decodes, I think I just about had this sequence but didnt see the wood for the trees and overlooked its simplicity, im impresed at ariving at this so quickly :) Colin =^.^=
From: James Waldby on 14 Aug 2006 22:55 colin wrote: > > "James Waldby" <j-waldby(a)pat7.com> wrote in message > news:44E12018.27627545(a)pat7.com... > > colin wrote: > > ... > > > I need a circuit to divide a <50mhz digital signal by 25/16. > > > ie. i need to lose 9 out of every 25 pulses. > > ... > > > > As 25/16 = (5/4)^2, if you follow a 5/4 divider by > > another one, you'll have 25/16. > > > > -jiw > > oo, thats well spotted, so I need 2 circuits that each lose 1 out of 5 > pulses. > I wonder if that actually works out simpler than 1 that loses 9 out of 25. > or did you have something in mind ? You could do two of them with a 74LS04, a 74LS11, and two 4017's. Invert O4 and O9 from a 4017, into two inputs of a 3-input And, gating the third input. There might well be some simpler way... -jiw
From: vasile on 15 Aug 2006 06:00 colin wrote: > Hi, > I need a circuit to divide a <50mhz digital signal by 25/16. > ie. i need to lose 9 out of every 25 pulses. > Is there a simple/standard way to do this ? There is a tehnique called "fractionary divider" in which the key is adding a "positive" or a "negative" feedback to a D type flip-flop. The effect is just you need, loosing an output pulse. Unfortunately I saw the methode in an old RF german book written in "77 and I can't find it right now. Maybe a deep search with google with "fractionar divider tehnique" ? greetings, Vasile
From: Rich Grise on 15 Aug 2006 12:38 On Mon, 14 Aug 2006 23:56:16 +0000, colin wrote: > "John Popelish" <jpopelish(a)rica.net> wrote in message > news:yLCdnS-F2clLlHzZnZ2dnUVZ_r6dnZ2d(a)adelphia.com... >> How about dividing by a symmetrical output factor of 25 (1.875 MHz >> output), and then use a rather modest pll to multiply that frequency by >> 16. > > Although that would give the right output, it would limit the input range > by the range of the vco and is probably a bit more complicated, idealy i > just want to lose 9 out of every 25 input pulses, hopefully with just a > few logic ics. > > preferably not to lose all nine one after the other but thats just me > being a perfectionist. > What if you use a divide by 25 counter and an R-S flip-flop. The flip-flop drives a gate to gate the output on and off. When the counter hits 16, flip the flip-flop, which gates the output off, and then on count 25 (or would that be 26?) gate the output back on. (I.e., output 16 -> SET, and output 25 -> RESET. That's if you don't mind bursts of 16 with 9 blanks, so to speak. You did seem to indicate that it doesn't have to be a nice steady frequency, right? Good Luck! RIch
From: DJ Delorie on 15 Aug 2006 12:51
Rich Grise <rich(a)example.net> writes: > What if you use a divide by 25 counter and an R-S flip-flop. You don't need a flip flop, just use bit 4. |