Board layout for FPGA
in [FPGA]
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From: rickman on 16 Feb 2010 11:56 On Feb 9, 3:15 pm, glen herrmannsfeldt <g...(a)ugcs.caltech.edu> wrote: > Symon <symon_bre...(a)hotmail.com> wrote: > > (snip) > > > Sure Rick, let's go through it together with some cheap tools (free!) > > from t'internet. OK, you can get a nice copy of Spice from here. maybe > > you already have it. > >http://www.linear.com/designtools/software/ > > At the bottom of this post you will find a model of a PCB with a power > > plane bypass. I've used lumped components to model it. If you > > cut'n'paste the text into an editor and save it as 'planes.asc' or > > somesuch, you should be able to load it into the simulator you downloaded. > > (really big snip) > > I think you really need a model of the radial transmission line, > which I don't see (but could have missed). > > See the papers I mentioned in previous posts. I think I have figured out why you *don't* need to consider a radial transmission line in models of the PDS. The transmission line model is only effective if the length of the line is longer than about 1/6th of the rising edge of the signal. For a 0.5 ns rise time pulse the rising edge is about 3 inches in length on the PWB. So if you keep your caps within a half inch of the power pins of the chip, the transmission line effects are spread over the entire path (or averaged if you will). In other words, for adequately short paths, the electrical path between the power pins and decoupling caps appears as a lumped capacitance and does not need to be analyzed as a transmission line. Does that sound right? Rick
From: glen herrmannsfeldt on 16 Feb 2010 15:17 rickman <gnuarm(a)gmail.com> wrote: (snip, I wrote) >> I think you really need a model of the radial transmission line, >> which I don't see (but could have missed). >> See the papers I mentioned in previous posts. > I think I have figured out why you *don't* need to consider a radial > transmission line in models of the PDS. The transmission line model > is only effective if the length of the line is longer than about 1/6th > of the rising edge of the signal. For a 0.5 ns rise time pulse the > rising edge is about 3 inches in length on the PWB. So if you keep > your caps within a half inch of the power pins of the chip, the > transmission line effects are spread over the entire path (or averaged > if you will). In other words, for adequately short paths, the > electrical path between the power pins and decoupling caps appears as > a lumped capacitance and does not need to be analyzed as a > transmission line. It does seem that the previously mentioned papers analyze them in ways that I wouldn't think would matter. One even considers the reflection of other vias. But, there are a few things that I think should be considered. The inductance of the via, and the input impedance of the radial transmission line are proportional to 1/r. Big vias are better. A group of vias close enough together, though, should act like a large via. (The fields couple such that it isn't the same as parallel inductors.) It would seem that one should also be careful not to put the FPGA right in the center of a large ground plane, such the the edge reflections come back in phase. That would be especially bad for a large circular ground plane. If the decoupling capacitors were regularly spaced, that could also cause in-phase reflections. > Does that sound right? It doesn't seem so far off. It still seems that radial transmission line theory isn't taught much at all. -- glen
From: rickman on 16 Feb 2010 19:57 On Feb 16, 3:17 pm, glen herrmannsfeldt <g...(a)ugcs.caltech.edu> wrote: > rickman <gnu...(a)gmail.com> wrote: > > (snip, I wrote) > > >> I think you really need a model of the radial transmission line, > >> which I don't see (but could have missed). > >> See the papers I mentioned in previous posts. > > I think I have figured out why you *don't* need to consider a radial > > transmission line in models of the PDS. The transmission line model > > is only effective if the length of the line is longer than about 1/6th > > of the rising edge of the signal. For a 0.5 ns rise time pulse the > > rising edge is about 3 inches in length on the PWB. So if you keep > > your caps within a half inch of the power pins of the chip, the > > transmission line effects are spread over the entire path (or averaged > > if you will). In other words, for adequately short paths, the > > electrical path between the power pins and decoupling caps appears as > > a lumped capacitance and does not need to be analyzed as a > > transmission line. > > It does seem that the previously mentioned papers analyze them > in ways that I wouldn't think would matter. One even considers > the reflection of other vias. > > But, there are a few things that I think should be considered. > The inductance of the via, and the input impedance of the radial > transmission line are proportional to 1/r. Big vias are better. > A group of vias close enough together, though, should act like > a large via. (The fields couple such that it isn't the same > as parallel inductors.) > > It would seem that one should also be careful not to put the FPGA > right in the center of a large ground plane, such the the edge > reflections come back in phase. That would be especially bad for > a large circular ground plane. If the decoupling capacitors were > regularly spaced, that could also cause in-phase reflections. > > > Does that sound right? > > It doesn't seem so far off. It still seems that radial transmission > line theory isn't taught much at all. I am confused. You say that my analysis is not far off and the whole (hole) point of my analysis is to show that the radial transmission line effect is not important. Then you say you still think the radial transmission line effect *is* important. I am pretty sure that the effects of the decoupling caps swamps out the effect of the reflections. This is not very scientific and so may be totally wrong, but it would seem to me that the caps will "mute" the voltage transitions on the plane as the wave moves by. If it were a linear transmission line, the cap would "smear" out the edge of the wave front. In the PCB power plane the same thing happens, but it is likely strongest at the cap and is a weaker effect further away from the cap. In the case of a transient, smearing it out reduces the amplitude which is exactly what it is supposed to do. So I expect the wave front never reaches a board edge to cause a significant reflection. I will say that when the impedance of a PDS is measured the very high frequencies often have a sawtooth shape which is likely due to standing waves on the board. So there must be some of the transient that is reflected. But if you can verify your analysis method by measuring the impedance of the PDS to be below your requirements at all frequencies, what does it matter if the power planes form a "radial transmission line"? You only need to do enough analysis to get a "good enough" result. I would think that if this were an important effect, that would have been discovered by now. Rick
From: glen herrmannsfeldt on 16 Feb 2010 20:32 rickman <gnuarm(a)gmail.com> wrote: (snip, I wrote) >> But, there are a few things that I think should be considered. >> The inductance of the via, and the input impedance of the radial >> transmission line are proportional to 1/r. Big vias are better. >> A group of vias close enough together, though, should act like >> a large via. (The fields couple such that it isn't the same >> as parallel inductors.) >> It would seem that one should also be careful not to put the FPGA >> right in the center of a large ground plane, such the the edge >> reflections come back in phase. That would be especially bad for >> a large circular ground plane. If the decoupling capacitors were >> regularly spaced, that could also cause in-phase reflections. >> > Does that sound right? >> It doesn't seem so far off. It still seems that radial transmission >> line theory isn't taught much at all. > I am confused. You say that my analysis is not far off and the whole > (hole) point of my analysis is to show that the radial transmission > line effect is not important. Then you say you still think the radial > transmission line effect *is* important. > I am pretty sure that the effects of the decoupling caps swamps out > the effect of the reflections. This is not very scientific and so may > be totally wrong, but it would seem to me that the caps will "mute" > the voltage transitions on the plane as the wave moves by. If it works right, the capacitor should be an AC short between the planes. If, for example, you had a ring of capacitors around a constant radius from a via, then the reflection off those should come back in phase. That is pretty much the same as a microwave cavity resonator. > If it were > a linear transmission line, the cap would "smear" out the edge of the > wave front. A capacitor across a linear transmission line should make a nice reflection. A capacitor and series resistor should absorb some of the AC signal, but ignore the DC voltage. Though that assumes ideal capacitors. > In the PCB power plane the same thing happens, but it is > likely strongest at the cap and is a weaker effect further away from > the cap. In the case of a transient, smearing it out reduces the > amplitude which is exactly what it is supposed to do. So I expect the > wave front never reaches a board edge to cause a significant > reflection. I will say that when the impedance of a PDS is measured > the very high frequencies often have a sawtooth shape which is likely > due to standing waves on the board. So there must be some of the > transient that is reflected. In a real board with lots of ICs, vias, and bypass capacitors, you would hope that the reflections are rarely in phase. If parts are placed too regularly on the board, it would seem possible for some strong resonance to form. > But if you can verify your analysis method by measuring the impedance > of the PDS to be below your requirements at all frequencies, what does > it matter if the power planes form a "radial transmission line"? I think it only really matters for a very short distance. For that distance, though, it should be computed as a radial transmission line. > You only need to do enough analysis to get a "good enough" result. > I would think that if this were an important effect, that would have > been discovered by now. There have been plenty of cases where effects when unnoticed for way too long. If, for example, a board resonance turned out to be the same as an on-board frequency it could easily be very significant. Then an unrelated change would move the resonance, and the problem would go away without ever being found. -- glen
From: rickman on 17 Feb 2010 01:04
On Feb 16, 8:32 pm, glen herrmannsfeldt <g...(a)ugcs.caltech.edu> wrote: > rickman <gnu...(a)gmail.com> wrote: > > (snip, I wrote) > > > > >> But, there are a few things that I think should be considered. > >> The inductance of the via, and the input impedance of the radial > >> transmission line are proportional to 1/r. Big vias are better. > >> A group of vias close enough together, though, should act like > >> a large via. (The fields couple such that it isn't the same > >> as parallel inductors.) > >> It would seem that one should also be careful not to put the FPGA > >> right in the center of a large ground plane, such the the edge > >> reflections come back in phase. That would be especially bad for > >> a large circular ground plane. If the decoupling capacitors were > >> regularly spaced, that could also cause in-phase reflections. > >> > Does that sound right? > >> It doesn't seem so far off. It still seems that radial transmission > >> line theory isn't taught much at all. > > I am confused. You say that my analysis is not far off and the whole > > (hole) point of my analysis is to show that the radial transmission > > line effect is not important. Then you say you still think the radial > > transmission line effect *is* important. > > I am pretty sure that the effects of the decoupling caps swamps out > > the effect of the reflections. This is not very scientific and so may > > be totally wrong, but it would seem to me that the caps will "mute" > > the voltage transitions on the plane as the wave moves by. > > If it works right, the capacitor should be an AC short between the > planes. If, for example, you had a ring of capacitors around > a constant radius from a via, then the reflection off those should > come back in phase. That is pretty much the same as a microwave > cavity resonator. You are still talking about the reflections from the caps and I have already shown that the caps don't cause reflections as long as they are very close to the vias connecting the power pins. The wavelength of the transients are too long so that only a portion of the edge is ever distributed across the transmission line between the via and the cap. The result is that the reflection is insignificant and the cap acts to suppress the wavefront and not let it pass beyond the region around the cap. > > If it were > > a linear transmission line, the cap would "smear" out the edge of the > > wave front. > > A capacitor across a linear transmission line should make a nice > reflection. A capacitor and series resistor should absorb some > of the AC signal, but ignore the DC voltage. Though that assumes > ideal capacitors. But not if the transition time of the edge is slow compared to the transit time to the cap. The reflection would be the opposite phase, but much, much smaller in amplitude than the full transient. Meanwhile the amount of the transient passing the cap would also be very small because most of the energy is reflected. > > In the PCB power plane the same thing happens, but it is > > likely strongest at the cap and is a weaker effect further away from > > the cap. In the case of a transient, smearing it out reduces the > > amplitude which is exactly what it is supposed to do. So I expect the > > wave front never reaches a board edge to cause a significant > > reflection. I will say that when the impedance of a PDS is measured > > the very high frequencies often have a sawtooth shape which is likely > > due to standing waves on the board. So there must be some of the > > transient that is reflected. > > In a real board with lots of ICs, vias, and bypass capacitors, > you would hope that the reflections are rarely in phase. If parts > are placed too regularly on the board, it would seem possible for > some strong resonance to form. I don't mean to repeat myself endlessly, but I don't think you will see much of the reflections. The wave front does not pass the area around the cap since it is absorbed by the cap. The reflection from the cap is opposite in phase as the original transient and is only displaced a fraction of the width of the transient so it nearly cancels out in all directions. The degree to which it cancels out depends on the time offset of the reflection which is determined by the spacing between the cap and the power via and the strength of the reflection which in turn depends on the impedance of the cap at that frequency. The reflection is a good thing, not a bad thing. That is what reduces the transient! > > But if you can verify your analysis method by measuring the impedance > > of the PDS to be below your requirements at all frequencies, what does > > it matter if the power planes form a "radial transmission line"? > > I think it only really matters for a very short distance. For that > distance, though, it should be computed as a radial transmission line. I t would seem to me to make more of a difference over a larger distance where the impedance seen varies much more. If you think of it as an impedance that reduces with distance from the power via, it would create a continuous reflection back to the via, in effect reducing the amplitude of the transient. Imagine many, small reflections with only a very slight difference in phase summing up. In effect, it would be a lot like a lumped capacitance right at the via I think. > > You only need to do enough analysis to get a "good enough" result. > > I would think that if this were an important effect, that would have > > been discovered by now. > > There have been plenty of cases where effects when unnoticed for > way too long. If, for example, a board resonance turned out to > be the same as an on-board frequency it could easily be very > significant. Then an unrelated change would move the resonance, > and the problem would go away without ever being found. If that resonance were causing a problem, I would expect that it would be noticed and recognized at some point. Any given board might have some change made which will cause the problem to "go away", but I can't believe at this point in time no one would have ever seen this and recognized it for what it was. Why make up problems if they don't exist? Rick |