How do you design these days?
in [Design]
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From: Joel Koltner on 4 Jan 2010 20:54 "krw" <krw(a)att.bizzzzzzzzzzz> wrote in message news:gj45k5tr1g3rqe72k3tbff33lnke7c5sdk(a)4ax.com... > On Mon, 4 Jan 2010 15:02:59 -0800, "Joel Koltner" > <zapwireDASHgroups(a)yahoo.com> wrote: > That's the argument I get from the layout guy. I know they exist (e.g., the guys at UltraCAD), but so far I've never worked anywhere where the layout guy was particularly "proactive" in the sense of suggesting interesting/potentially useful new ways to deal with parts management... they instead seem to always have a reason why, no, you can't do it the way you're suggesting (even though you've done so many times over somewhere else...). C'est la vie... > As you pointed out earlier, though, this can lead to corrections not > being propagated to all symbols. Yes, with ORCAD that is a limitation. [The power block] > I make it the last, to get it out of the way. That's a bit more convenient, I just worry that I'll then forget it and that somehow a DRC run won't catch it either. (We don't have a "formal checklist" like John says he's working on to catch this sort of thing...) > I generally create the > "gates" from the front of the schematic to the back and the power > page(s) at the rear of the schematic. That's how most of ours end up too. Things like multi-pin headers/connectors usually end up on the first page if they contain signals that go "all over." (I prefer to place one big symbol for, e.g., a header connector and then immediately terminate them in named off-page connectors. I've seen people break connectors into, e.g., 50 discrete pins and just placed them exactly where they were needed, but I've only done that once personally -- I like to see all the pins "together" to make it obvious whether I'm running, e.g., some high-power switched signals next to some millivolt level inputs. The main campaign I go on WRT schematics is that, if your goal is to make it as clear as you can as to how the circuit operates, that effort is significantlly hampered by someone telling you there can only be one acceptable symbol for a given part. I even keep both a large and a small BJT symbol around and use the big ones for power (or otherwise "really important") devices and the small ones for generic switches other "lesser importance" functions. ---Joel
From: krw on 4 Jan 2010 21:31 On Mon, 4 Jan 2010 17:54:46 -0800, "Joel Koltner" <zapwireDASHgroups(a)yahoo.com> wrote: >"krw" <krw(a)att.bizzzzzzzzzzz> wrote in message >news:gj45k5tr1g3rqe72k3tbff33lnke7c5sdk(a)4ax.com... >> On Mon, 4 Jan 2010 15:02:59 -0800, "Joel Koltner" >> <zapwireDASHgroups(a)yahoo.com> wrote: >> That's the argument I get from the layout guy. > >I know they exist (e.g., the guys at UltraCAD), but so far I've never worked >anywhere where the layout guy was particularly "proactive" in the sense of >suggesting interesting/potentially useful new ways to deal with parts >management... they instead seem to always have a reason why, no, you can't do >it the way you're suggesting (even though you've done so many times over >somewhere else...). C'est la vie... Ayup! It's like *work*! >> As you pointed out earlier, though, this can lead to corrections not >> being propagated to all symbols. > >Yes, with ORCAD that is a limitation. > >[The power block] > >> I make it the last, to get it out of the way. > >That's a bit more convenient, I just worry that I'll then forget it and that >somehow a DRC run won't catch it either. (We don't have a "formal checklist" >like John says he's working on to catch this sort of thing...) We don't have such a checklist either, but it's pretty hard to forget the power "gate" when it has 70 pins. ;-) OTOH, I can see it happening on an OpAmp, of thirty. >> I generally create the >> "gates" from the front of the schematic to the back and the power >> page(s) at the rear of the schematic. > >That's how most of ours end up too. Things like multi-pin headers/connectors >usually end up on the first page if they contain signals that go "all over." Ours are at the back, but I too prefer connectors (all I/O) at the front. I like hierarchical design and if I can't have a real hierarchy, at least I'll try to make it look like it. ;-) >(I prefer to place one big symbol for, e.g., a header connector and then >immediately terminate them in named off-page connectors. I've seen people >break connectors into, e.g., 50 discrete pins and just placed them exactly >where they were needed, but I've only done that once personally -- I like to >see all the pins "together" to make it obvious whether I'm running, e.g., some >high-power switched signals next to some millivolt level inputs. Ick! I prefer to go directly to off-page connectors, too. That way the nets get a real name (instead of an alias). I don't always, though. Having pins from one connector all over the place is just evil. >The main campaign I go on WRT schematics is that, if your goal is to make it >as clear as you can as to how the circuit operates, that effort is >significantlly hampered by someone telling you there can only be one >acceptable symbol for a given part. Agreed. It's dangerous having more than one, though. >I even keep both a large and a small BJT >symbol around and use the big ones for power (or otherwise "really important") >devices and the small ones for generic switches other "lesser importance" >functions. I'm getting rid of most of the "unimportant" BJTs in favor of pre-biased BJTs (RETs). I made a symbol for them that's small, yet unmistakable. An SC75 shouldn't take a half a page. ;-)
From: John Larkin on 4 Jan 2010 21:58 On Mon, 04 Jan 2010 20:31:49 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote: >On Mon, 4 Jan 2010 17:54:46 -0800, "Joel Koltner" ><zapwireDASHgroups(a)yahoo.com> wrote: > >>"krw" <krw(a)att.bizzzzzzzzzzz> wrote in message >>news:gj45k5tr1g3rqe72k3tbff33lnke7c5sdk(a)4ax.com... >>> On Mon, 4 Jan 2010 15:02:59 -0800, "Joel Koltner" >>> <zapwireDASHgroups(a)yahoo.com> wrote: >>> That's the argument I get from the layout guy. >> >>I know they exist (e.g., the guys at UltraCAD), but so far I've never worked >>anywhere where the layout guy was particularly "proactive" in the sense of >>suggesting interesting/potentially useful new ways to deal with parts >>management... they instead seem to always have a reason why, no, you can't do >>it the way you're suggesting (even though you've done so many times over >>somewhere else...). C'est la vie... You haven't worked with The Brat. >> >>That's a bit more convenient, I just worry that I'll then forget it and that >>somehow a DRC run won't catch it either. (We don't have a "formal checklist" >>like John says he's working on to catch this sort of thing...) I'm not working on the checklist... The Brat is! >We don't have such a checklist either, but it's pretty hard to forget >the power "gate" when it has 70 pins. ;-) OTOH, I can see it >happening on an OpAmp, of thirty. > >>> I generally create the >>> "gates" from the front of the schematic to the back and the power >>> page(s) at the rear of the schematic. >> >>That's how most of ours end up too. Things like multi-pin headers/connectors >>usually end up on the first page if they contain signals that go "all over." The first page of our schematics is the block diagram and table of contents. John
From: Phil Hobbs on 4 Jan 2010 22:24 On 1/3/2010 7:49 PM, John Larkin wrote: > On Sun, 03 Jan 2010 14:15:52 -0600, krw<krw(a)att.bizzzzzzzzzzz> wrote: > >> On Sun, 03 Jan 2010 10:08:15 -0800, John Larkin >> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >> >>> On Fri, 01 Jan 2010 19:19:42 -0600, krw<krw(a)att.bizzzzzzzzzzz> wrote: >>> >>>> On Fri, 01 Jan 2010 17:40:54 -0500, ehsjr<ehsjr(a)nospamverizon.net> >>>> wrote: >>>> >> >> <snip> >> >>>>> You've got a steadier hand than I'll ever have. >>>>> I have to do it with a Dremel mounted in a drill press >>>>> adapter, and slide the board against guides clamped to >>>>> the bed. Even then ... :-( >>>> >>>> Sounds like you need a small milling machine. >>> >>> We had one of those PCB mills, on indefinite loan from a customer who >>> wasn't using it. It was such a hassle that we wound up not using it >>> too. >> >> Gotta be better than fence clamped to a drill press. >> >>> I can do the modest stuff with a knife and some kapton tape. After >>> that, it's easiest to just lay out a board and have a pcb house make a >>> few. >> >> You mean copper-clad kapton tape? > > No, just bits stuck to the copperclad and cut into patterns, as local > insulators. But I guess you could do multilayer breadboards with > layers of kapton tape and copper foil tape. Stained-glass folks sell > copper tape. > > You could make pretty good transmission lines! > > John > Copper tape is good medicine for FR4 shield boxes. Makes it much easier to have a continuous shield all the way round, and it's also great for putting hinged tops on shields. I use it all the time. Although the glue is a reasonable insulator, the die-cutting process rolls the edge of the copper so that it'll almost always short out to the ground plane if you try using it as a bus bar. Little strips of FR4 are best for that. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal ElectroOptical Innovations 55 Orchard Rd Briarcliff Manor NY 10510 845-480-2058 hobbs at electrooptical dot net http://electrooptical.net
From: John Larkin on 4 Jan 2010 23:21
On Mon, 04 Jan 2010 18:59:09 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote: >On Sun, 03 Jan 2010 22:33:34 -0800, John Larkin ><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: > >>On Sun, 03 Jan 2010 19:43:46 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote: >> >>>On Sun, 03 Jan 2010 16:49:45 -0800, John Larkin >>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>> >>>>On Sun, 03 Jan 2010 14:15:52 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote: >>>> >>>>>On Sun, 03 Jan 2010 10:08:15 -0800, John Larkin >>>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>>> >>>>>>On Fri, 01 Jan 2010 19:19:42 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote: >>>>>> >>>>>>>On Fri, 01 Jan 2010 17:40:54 -0500, ehsjr <ehsjr(a)nospamverizon.net> >>>>>>>wrote: >>>>>>> >>>>> >>>>><snip> >>>>> >>>>>>>>You've got a steadier hand than I'll ever have. >>>>>>>>I have to do it with a Dremel mounted in a drill press >>>>>>>>adapter, and slide the board against guides clamped to >>>>>>>>the bed. Even then ... :-( >>>>>>> >>>>>>>Sounds like you need a small milling machine. >>>>>> >>>>>>We had one of those PCB mills, on indefinite loan from a customer who >>>>>>wasn't using it. It was such a hassle that we wound up not using it >>>>>>too. >>>>> >>>>>Gotta be better than fence clamped to a drill press. >>>>> >>>>>>I can do the modest stuff with a knife and some kapton tape. After >>>>>>that, it's easiest to just lay out a board and have a pcb house make a >>>>>>few. >>>>> >>>>>You mean copper-clad kapton tape? >>>> >>>>No, just bits stuck to the copperclad and cut into patterns, as local >>>>insulators. >>> >>>What good does that do? I guess I don't see the purpose of the >>>insulator without a pad to solder to. Got a picture? >> >>Under the SO8... >> >>ftp://jjlarkin.lmi.net/BB_fast.JPG > >Neat. I would have thought you would have just hogged out the foil >underneath. > >BTW, John, I've had some time to play with the fake caps and fake >resistors. I looked up the pointer to your circuit in the archives >but the pointee is gone. Any chance you could put it up again? Any >other pointers would be very handy, too. I need something that's good >for four quadrants (or at least bipolar currents). Thanks. I don't seem to have that around. I could redraw it, but it's not adaptable to bipolar use so may not do you any good. We did do this... http://www.highlandtechnology.com/DSS/V420DS.html but the circuit is quite complex and it wouldn't be prudent to post it publicly. 4 quadrants is even more interesting. John |