How do you design these days?
in [Design]
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From: John Larkin on 3 Jan 2010 13:25 On Sun, 03 Jan 2010 07:04:40 +0000, John Devereux <john(a)devereux.me.uk> wrote: >John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> writes: > >> On Fri, 01 Jan 2010 18:33:34 +0000, John Devereux >> <john(a)devereux.me.uk> wrote: >> >>>Bill Sloman <bill.sloman(a)ieee.org> writes: >>> >>>> On Jan 1, 6:00�am, Spehro Pefhany <speffS...(a)interlogDOTyou.knowwhat> >>>> wrote: >>>>> On Thu, 31 Dec 2009 09:10:22 -0700, the renowned Don Lancaster > >[...] > >>>>> >It is NEVER right the first time. >>>>> >>>>> Keep firing people who have that attitude and it eventually will be! >>>> >>>> Perhaps. But if the survivors are sufficiently nervous of getting >>>> fired that they triple-check every aspect of the circuit before they >>>> commit to a printed circuit layout, you may find that you get to the >>>> final layout more slowly than you would have if you'd gone through a >>>> throw-away prototype layout along the way. >>> >>>I'm going through this right now. New (208 pin!) microcontroller, ADC, >>>connectors, SMPS chip. I can spend an extra couple of days re-checking >>>everything, and I just *know* I will still miss a couple of things. Or I >>>can just go ahead and make the damn board. >>> >>>I think I'll just go ahead and see how it turns out. At some point it's >>>actually quicker and cheaper to debug using the real thing. >> >> You have to debug the real thing anyhow, so it makes sense to try to >> do the final product first pass. That saves a lot of time and teaches >> good disciplines. And you may be able to sell it. > >That *is* what I am doing. But don't you find there is eventually a >point of diminishing returns with respect to "paper" analysis and >prototyping? The last bug you did have on a rev A board, couldn't you >have found it by staring at the design for another week, checking >datasheets, going through the operation in your head? Maybe prototyping >some more bits of the circuit? Sure, there's a point of diminishing return. But a tradeoff of a week of checking to avoid a board spin is clearly worth it. Most of the time, in hardware or software, a bug just makes you look at an error that was in plain sight and would have been prevented by checking. We check enough that maybe 80% or so of our boards are sellable at first etch. I suspect we could do a little better, 90% maybe, and that would be worth it. The Brat is working on a checklist for design review to formalize our release process. There will be something like 40 items on it. John
From: krw on 3 Jan 2010 15:15 On Sun, 03 Jan 2010 10:08:15 -0800, John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >On Fri, 01 Jan 2010 19:19:42 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote: > >>On Fri, 01 Jan 2010 17:40:54 -0500, ehsjr <ehsjr(a)nospamverizon.net> >>wrote: >> <snip> >>>You've got a steadier hand than I'll ever have. >>>I have to do it with a Dremel mounted in a drill press >>>adapter, and slide the board against guides clamped to >>>the bed. Even then ... :-( >> >>Sounds like you need a small milling machine. > >We had one of those PCB mills, on indefinite loan from a customer who >wasn't using it. It was such a hassle that we wound up not using it >too. Gotta be better than fence clamped to a drill press. >I can do the modest stuff with a knife and some kapton tape. After >that, it's easiest to just lay out a board and have a pcb house make a >few. You mean copper-clad kapton tape? We use kapton tape as an insulator. >Teflon board material is a lot easier to x-acto than FR4. You can get >it on ebay. Maybe I'll try it, but I don't do much prototyping. We have a prototyping machine but bringing it up has always been on the "to do" list.
From: krw on 3 Jan 2010 15:20 On Sun, 03 Jan 2010 10:19:37 -0800, John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >On Sun, 3 Jan 2010 07:37:19 -0800 (PST), MooseFET <kensmith(a)rahul.net> >wrote: > >>On Jan 2, 7:58�pm, krw <k...(a)att.bizzzzzzzzzzz> wrote: >>> On Sat, 02 Jan 2010 20:45:11 -0700, Jim Thompson >>> >>> >>> >>> <To-Email-Use-The-Envelope-I...(a)My-Web-Site.com/Snicker> wrote: >>> >On Sat, 02 Jan 2010 21:36:09 -0600, krw <k...(a)att.bizzzzzzzzzzz> wrote: >>> >>> >>On Sat, 02 Jan 2010 17:03:43 -0800, John Larkin >>> >><jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: >>> >>> >>>On Thu, 31 Dec 2009 09:41:54 -0800, "Joel Koltner" >>> >>><zapwireDASHgro...(a)yahoo.com> wrote: >>> >>> >>>>"John Larkin" <jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote in message >>> >>>>news:7glpj5l1a7i5nm45bsp5gfhc016e3kjgo8(a)4ax.com... >>> >>>>> On Thu, 31 Dec 2009 09:10:22 -0700, Don Lancaster <d...(a)tinaja.com> >>> >>>>>>It is NEVER right the first time. >>> >>>>> We sell about 80% of our rev A boards, with no prototypes. Assuming >>> >>>>> the first unit won't work is self-fulfilling, and a good way to make >>> >>>>> sure the third iteration won't work either. >>> >>> >>>>I agree with your philosophy John... but you do allow yourself a non-zero >>> >>>>number of blue wires or a couple of tack-soldered components or something on >>> >>>>those saleable rev. A boards too though, right? >>> >>> >>>Sure, that happens. But it's supposed to be embarassing. >>> >>> >>>We make blue boards and I think we should use red wires. But >>> >>>production insists on blue. >>> >>> >>I know one company that does use red wires, so oops's stand out like >>> >>the sore thumb they are. � >>> >>> >Isn't "blue wire" sort of a historic standard ?:-) >>> >>> In IBM they were known as "yellow wires", not matter what color. �The >>> original Teflon WireWrap wires were yellow and the name was kept. �I >>> don't even remember what color we use now. >> >>I tend to spec the part number with a -(any) on the end for color. >>Batch to batch from production will have different colors. The >>number of jumpers has dropped to maybe one or two at the most. The >>most common has always been the missed connection in the layout >>or schematic. If you call a power supply "+24V" in one place and >>"+24" in another, they are (no surprise) not connected. I now make >>it a rule to always check my supply naming as the last check before >>layout. > >It helps to print out a net list and read it. If you see VREF and >REFV, investigate! > >One mistake we used to make too often was swapping V+ and V- on >opamps. Engineers tend to flip an opamp to make the feedback path look >nice (different for inverting/noninverting) and that moves the power >pins too. We check that really hard now. We've done that too. The boss caught it last time. In that case the layout guy screwed up the library. I also made him add an alternative view for all op-amps so I can show them either way and still have the power pins in the right place. It was a lot cheaper than a board spin (with no other information gained). >We *almost* made some boards that had the BGA pitch wrong, due to some >metric/inch rounding error that got us 3/4 of a ball wrong across the >whole chip. Caught that by accident before it got out. That's something I'd never find. >I'm always a little anxious until the first successful powerup, and >then until the uP runs code, and then until the FPGA configures, and >then... You're done, aren't you? ;-) >On a recent board, there came a point when Linux was talking through >PCI Express to our FPGA, and everybody cheered. Beer time.
From: Nico Coesel on 3 Jan 2010 15:20 "miso(a)sushi.com" <miso(a)sushi.com> wrote: >On Dec 31, 12:50=A0pm, Joerg <inva...(a)invalid.invalid> wrote: >> Phil Hobbs wrote: >> > On 12/30/2009 9:20 PM, Joerg wrote: >> >> RogerN wrote: > >Vector board is insanely priced. I buy it up at flea markets when I >find good deals and nibble out small pieces for circuits to conserve What do you can an insane price? Loads of compagnies sell similar stuff. FR4 is actually cheaper then phenolic. -- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico(a)nctdevpuntnl (punt=.) --------------------------------------------------------------
From: John Devereux on 3 Jan 2010 16:52
John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> writes: > On Sun, 03 Jan 2010 07:04:40 +0000, John Devereux > <john(a)devereux.me.uk> wrote: > >>John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> writes: >> >>> On Fri, 01 Jan 2010 18:33:34 +0000, John Devereux >>> <john(a)devereux.me.uk> wrote: >>> >>>>Bill Sloman <bill.sloman(a)ieee.org> writes: >>>> >>>>> On Jan 1, 6:00 am, Spehro Pefhany <speffS...(a)interlogDOTyou.knowwhat> >>>>> wrote: >>>>>> On Thu, 31 Dec 2009 09:10:22 -0700, the renowned Don Lancaster >> >>[...] >> >>>>>> >It is NEVER right the first time. >>>>>> >>>>>> Keep firing people who have that attitude and it eventually will be! >>>>> >>>>> Perhaps. But if the survivors are sufficiently nervous of getting >>>>> fired that they triple-check every aspect of the circuit before they >>>>> commit to a printed circuit layout, you may find that you get to the >>>>> final layout more slowly than you would have if you'd gone through a >>>>> throw-away prototype layout along the way. >>>> >>>>I'm going through this right now. New (208 pin!) microcontroller, ADC, >>>>connectors, SMPS chip. I can spend an extra couple of days re-checking >>>>everything, and I just *know* I will still miss a couple of things. Or I >>>>can just go ahead and make the damn board. >>>> >>>>I think I'll just go ahead and see how it turns out. At some point it's >>>>actually quicker and cheaper to debug using the real thing. >>> >>> You have to debug the real thing anyhow, so it makes sense to try to >>> do the final product first pass. That saves a lot of time and teaches >>> good disciplines. And you may be able to sell it. >> >>That *is* what I am doing. But don't you find there is eventually a >>point of diminishing returns with respect to "paper" analysis and >>prototyping? The last bug you did have on a rev A board, couldn't you >>have found it by staring at the design for another week, checking >>datasheets, going through the operation in your head? Maybe prototyping >>some more bits of the circuit? > > Sure, there's a point of diminishing return. But a tradeoff of a week > of checking to avoid a board spin is clearly worth it. Most of the > time, in hardware or software, a bug just makes you look at an error > that was in plain sight and would have been prevented by checking. We > check enough that maybe 80% or so of our boards are sellable at first > etch. I suspect we could do a little better, 90% maybe, and that would > be worth it. We usually hand-build a prototype of the "first etch", and use it as a development board for the firmware. After fixing any remaining bugs, I am then sufficiently confident of the design to go to "production" (typically only 50-100pcs for our stuff). This is actually the most expensive cost, the solder stencil costs more than the bare boards! I suppose it depends on the board, but for us that hypothetical week of extra checking to avoid a board spin would *not* normally be worth it. We wouldn't be confident enough to go straight to a production run, so would still need to hand-make a prototype. Sure, "getting it right first time" would save us a couple of hundred dollars in NRE, but cost us up to a week of engineering time in this scenario. > The Brat is working on a checklist for design review to formalize our > release process. There will be something like 40 items on it. That's what I do, go through a checklist. If a bug ever makes it through - or nearly does - that "class" of bug gets added to the list. It's useful, although time consuming. -- John Devereux |