In system memory editor of Altera for Xilinx
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From: Antti on 30 Jan 2010 16:12 > > To debuging proposes you can try JTAG loader, part of KCPSM3 and can > be downloaded from Xilinx web site. > May be you need do some "bricolage" but work fine. > > Walter Hi Walter, well it depends, for me, I can write own JTAG tools and JTAG IP cores as i please, and do get things done as needed. The OP question was more about FPGA vendor own support tools that use vendor JTAG tools and adapters and can modify the FPGA registers and BRAM in generic, without ANY support in user VHDL using the configuration logic bypass functions, its like partial dynamic reconfiguration, maybe it understood now better. This is possible and supported by Altera Quartus, and NOT supported by any Xilinx tools. Antti
From: Walter on 31 Jan 2010 15:03 Antti escribi�: >> To debuging proposes you can try JTAG loader, part of KCPSM3 and can >> be downloaded from Xilinx web site. >> May be you need do some "bricolage" but work fine. >> >> Walter > > Hi Walter, > > well it depends, for me, I can write own JTAG tools and JTAG IP cores > as i please, and do get things done as needed. > > The OP question was more about FPGA vendor own support tools that use > vendor JTAG tools and adapters and can modify the FPGA registers and > BRAM in generic, without ANY support in user VHDL using the > configuration logic bypass functions, its like partial dynamic > reconfiguration, maybe it understood now better. This is possible and > supported by Altera Quartus, and NOT supported by any Xilinx tools. > > Antti > > Hi Antti, In my projects, many times I need write software/firmware and hardware only to debugging. I try to answer the original post; how solve a specific problem with a more or less simple general solution; JTAGLoader or a simple VHDL/Verilog UART plus a 8 U$D USB-RS232-TLL adapter can be used to modify a design for debugging without need write software, if the designer designs for verification. Others is Xilinx's tools, well, I use Xilinx's tools since many years, the tool is today (I use ISE 10) several times more friendly but not necessarily more productive than older Xilinx's tools. The Xilinx's tools are a complex piece of software and as T.Hoare sentence at '80. "There are two ways of constructing a software design: One way is to make it so simple that there are obviously no deficiencies, and the other way is to make it so complicated that there are no obvious deficiencies. The first method is far more difficult." Thinking in my daily work, memory editor could be a nice feature but not necessarily in the firsts places of my list of necessary features. It may be a good exercise for us all, list the ISE features that we use daily, occasionally or never used and which features would be interesting to add. If we reach a consensus, Xilinx perhaps listen to us. Walter. --- news://freenews.netfront.net/ - complaints: news(a)netfront.net ---
From: rickman on 1 Feb 2010 01:34 On Jan 29, 12:11 pm, Antti <antti.luk...(a)googlemail.com> wrote: > On Jan 29, 7:01 pm, austin <aus...(a)xilinx.com> wrote: > > > > > Antti, > > > "If Xilinx cared about the customers...." > > > Cruel, and inappropriate. > > > Of course we care (deeply) about our customers! > > > "Because Xilinx does not have Tool-A, they have no concern for > > customers..." > > > It would be equally true then to say because the 'other guy' has no > > domain specific platforms, that they have zero regard for their > > customers, and force them to re-invent the wheel before they even > > begin a project ... (which in my humble opinion is all true) > > > So, let us refrain from 'name calling', one could waste a great deal > > of time, > > > Austin > > ah, relax.. > > both X and A care for the shareholders. > > but the topic about the "memory editor" is well, it would be SO EASY > for Xilinx todo, > but it has not been done. some 3rd party could do, i could do it, but > it would be much > more work for me todo it properly as it would be for xilinx, besides > because Xilinx > does not open up the xilinx usb cable protocol i could not support > xilinx cables > from my tool, so it would be pointless todo. I like the way that Austin gets all hot under the collar when you say "extreme" things about Xilinx, which we all know to take with a grain of salt, (even if we pretty much agree with them) but he completely ignores the real issue being discussed. His reply, "we are (trying to) prevent poor coding practices, which lead to errors" seems to be saying that the programmer is not to be trusted with tools that allow him to work the way he wants. Geeze, there are any number of reasons why a designer would want to manipulate the initial values in the BRAMs "on the fly". Obviously that is why Altera provides these tools. Otherwise we are left to think that Altera wants to promote "poor coding practices" and errors. > there are two reasons why Xilinx does not have memory editor > 1) there are some silicon problems, errata, bugs with the silicon > preventing the usefulnes of the tool > 2) Xilinx just doesnt care to offer this tool > > I see no other reasons. you can choose. either silicon problems, or > lazy programmers. > or management issues. i figured out 3rd option. > > but.. DATA2MEM is MUCH more important (yeah for the customers) then > the memory editor > and well Altera has no data2mem possibility at all, what is real > problem. > > Xilinx has what is really needed, and misses on optional "good to > have" thing that is not > that vital. > > Antti Personally, I think both tools are very useful. Once a design is compiled and a bit file produced that works properly, it can be very useful to produce different versions of the bit stream with different data in the BRAMs. But during debug it can be much more expedient to download the BRAM data on the fly as needed. Potentially it could even be useful to download the BRAM contents ov er JTAG in the field, but I see that as a very limited application. But I can assure you that if either company had just one very large customer who requested a tool like this, they would get it. So most likely, each company has produced the tool that their customers have requested. Rick
From: rickman on 1 Feb 2010 01:36 On Jan 29, 12:06 pm, "jmunir" <jmunir(a)n_o_s_p_a_m.gts.tsc.uvigo.es> wrote: > So, my question is: > > When I implement a block and I would like to control several of his > parameters to test its behaviour, do I have to recompile each time I want > to change one of them? :O > > That has not sense! It is impractical! > > J. I don't think you need to recompile the HDL. You need to produce a new bit stream from the original bitstream. Still, this requires a number of steps, which can be done in one step with a JTAG tool. Rick
From: Goran_Bilski on 1 Feb 2010 03:26
On Feb 1, 7:36 am, rickman <gnu...(a)gmail.com> wrote: > On Jan 29, 12:06 pm, "jmunir" <jmunir(a)n_o_s_p_a_m.gts.tsc.uvigo.es> > wrote: > > > So, my question is: > > > When I implement a block and I would like to control several of his > > parameters to test its behaviour, do I have to recompile each time I want > > to change one of them? :O > > > That has not sense! It is impractical! > > > J. > > I don't think you need to recompile the HDL. You need to produce a > new bit stream from the original bitstream. Still, this requires a > number of steps, which can be done in one step with a JTAG tool. > > Rick Hi, If you have a design where you want to modify the BRAM contents, data2mem is the tool to use. It can modify an existing bitfile and creates a new bitfile with the new BRAM contents. After you have created the .bmm file, it's just one call to data2mem to create a new bitfile with modified BRAM contents. It takes a few seconds to finish. If you just want to toggle some registers down in the target, you can use Chipscope VIO which allows you to modify signal values in target using JTAG. I agree that it would be good to have a tool that allow you full control of everything in the device over JTAG but I can also think of 10+ other tools that would be good to have. Xilinx doesn't have an infinite number of resources for doing tools and we have to pick which one we should do. One can argue that a comprehensive JTAG debug tool should be one of them but as today, Xilinx has data2mem and chipscope. It allows customers accomplish what they want although it might not be in easiest way for everyone. Göran |