Unified FPGA Development Suite
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From: krw on 10 Oct 2009 17:28 On Sat, 10 Oct 2009 11:18:48 -0700, Charlie E. <edmondson(a)ieee.org> wrote: >On Fri, 9 Oct 2009 21:18:47 -0500, "Jon Slaughter" ><Jon_Slaughter(a)Hotmail.com> wrote: > >>Is there a development suite that is good but can target multiple fpga >>manufactures? I don't really want to install a bunch of 1GB+ light versions >>for each manufacture just to see which one is best. In fact I can't even get >>libero to run because it crashes on startup. >> >>Also, know of any links for DIY fpga programmers? How hard is it to >>program? I figured that one just has to feed a bitstream into the fpga >>similar to how a pic is programmed(or most devices actually). Looking at >>the proASIC's makes me think it's a bit different but I haven't found any >>conclusive way to program them except by using DirectC or the STAPL Player. >>Since I'm experimenting with these different manufactures I don't want to >>have to buy a programmer for each chip. For as much as they cost I could get >>nanoboard with 10^10x the functionality. >> >Jon, >Ok, thought about this a bit. Part of the problem is that the EDA >companies basically just provide a front end for the FPGA company's >tools. They don't try and duplicate that back end effort, it isn't >worth it for them. So, if you want to do more than just preliminary >designs for each vendor, you will still have to install X number of >starter editions for each vendor you want to try. Pretty much, but a lot of the design can be done on any one of the vendor's tools then the design ported to the others. Of course this presumes that you don't instantiate any primitives or use exclusive features. >For the price, Altium at $3999 is probably the cheapest major company. >When paired with their nanoboards, you can get a decent development >platform to really try things out. Their latest nanoboard is only >$399 and comes with a years subscription to the front end software. WHy spend the money. $4K is still a lot when the manufacturer's give the stuff away. They're quite eager for business now too. ;-) I Bought one of Altera's Cyclone-III (Arrow's, actually) development boards for $200. There are even cheaper development boards out there. Actel forgot to take their back. ;-) >There may be other small players, like Proteus, but I am unfamiliar >with the tools. If all they're offering is the front end, why bother unless the manufacturer's free tools don't work (high end chips or *really* tight designs)?
From: krw on 10 Oct 2009 17:59 On Sat, 10 Oct 2009 13:55:34 -0700, Jim Thompson <To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> wrote: >On Sat, 10 Oct 2009 12:55:32 -0500, krw <krw(a)att.bizzzzzzzzzzz> wrote: > >>On Sat, 10 Oct 2009 08:33:24 -0700, Jim Thompson >><To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> wrote: >> >>>On Sat, 10 Oct 2009 00:04:43 -0500, krw <krw(a)att.bizzzzzzzzzzz> wrote: >>> >>>>On Fri, 9 Oct 2009 21:18:47 -0500, "Jon Slaughter" >>>><Jon_Slaughter(a)Hotmail.com> wrote: >>>> >>>>>Is there a development suite that is good but can target multiple fpga >>>>>manufactures? I don't really want to install a bunch of 1GB+ light versions >>>>>for each manufacture just to see which one is best. In fact I can't even get >>>>>libero to run because it crashes on startup. >>>> >>>>I had to download Libero four times at home before it would run. It >>>>worked fine at work though. >>>> >>>>You can use Synplify, or a number of others, as the front end tool. If >>>>you buy the license directly from Synopsis with the necessary >>>>libraries for all vendors, but you're stuck with the manufacturer's >>>>tools for the back end. Be warned, this approach is not for the poor >>>>and is generally only done by those that either need really big >>>>devices (and pay through the nose already) or need really fine tuned >>>>logic. >>> >>>Is there a cheap synthesis tool for us poor analog guys that will >>>synthesize a modest sequential task (in gates)? >> >>Not sure what you want to do. Describe a function in HDL and have it >>spit out unit logic? I don't know of anything that does that. Some >>tools have a logic viewer that might do it. I think Actel's is >>included in the free tools, but I haven't used it yet (trying not to >>use Actel, right now). > >Clearly I'm not a digital guy... at least beyond pure combinational >reduction, which I actually used to teach about 40 years ago. No one does logic reduction anymore, if they ever did. Gates are free. ;-) >What I'd like is some tool that took in a truth table, each line >representing states at that clock tick, spitting out gates, flops, >etc., to implement that ;-) That's easy. Put the table in a ROM and put a counter at the input. If you really want to get fancy, put a register at the output. ;-) >I know. I know. Hire you ?:-) Nah, I'm busy now, amazingly enough with mostly analog stuff.
From: Jon Slaughter on 10 Oct 2009 18:08 The problem I have is that I brought a few proASIC3's a while ago and I would like to use them. Unfortunately the libero IDE just crashes on my system. I can't even get it to a splash screen(which I imagine there is one). There support is of no help as they just say "Reinstall"(whcih I've done for various versions). Now, it does run under vista in my dual boot configuration but I have all my tools in XP and never use vista. Hence, I would like to be able to develop and debug fgpa code in a working environment under XP. I can then hop over to vista and "compile" the stuff in libero when I need the specific device code. I know there are tools that do what I want. I think FPGA Advantage does it... or did it. A book called fpga warrior mentions some linux tools(I have). Basically I just need something to get started writing some code so I can get my head wrapped around how it all works(I have an idea but I need to get some experience). I prefer to work in a C++ like language since I'm more familiar with it and oop is more powerful for complex designs. I think linux has a SystemC compiler. I do have Cygwin installed so might be able to use some of the tools there. It just popped into my head that I could probably install libero in a VM. Although I would like something that runs directly if possible. The point is that I just need to get started. I have some proASIC's. While I can't technically use them yet I would like to use them(since I spend about 50$ on a few chips) eventually so I want to target them. It is my understanding though that the top level code(VHDL, Verlog, or whatever) is device independent so I can still play around and hopefully even simulate. When I'm ready to do a hard test I can then just transfer the code to the platform, in this case libero, and go from there as if I started there in the first place.
From: Jim Thompson on 10 Oct 2009 18:20 On Sat, 10 Oct 2009 16:59:31 -0500, krw <krw(a)att.bizzzzzzzzzzz> wrote: >On Sat, 10 Oct 2009 13:55:34 -0700, Jim Thompson ><To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> wrote: > [snip] >> >>Clearly I'm not a digital guy... at least beyond pure combinational >>reduction, which I actually used to teach about 40 years ago. > >No one does logic reduction anymore, if they ever did. Gates are >free. ;-) > >>What I'd like is some tool that took in a truth table, each line >>representing states at that clock tick, spitting out gates, flops, >>etc., to implement that ;-) > >That's easy. Put the table in a ROM and put a counter at the input. >If you really want to get fancy, put a register at the output. ;-) > [snip] What I do now (when I don't hand-off the trouble to a buddy) is do exactly that, counter, plus addressing. So-so for simple stuff. Isn't there a better way? I'm not doing FPGA... I'm doing "gates-on-demand" ;-) ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
From: Jon Slaughter on 10 Oct 2009 19:01
http://chitlesh.fedorapeople.org/FEL/ Free but not sure if it is used for fpga simulation. |