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From: MooseFET on 11 Oct 2009 13:11 On Oct 11, 8:32 am, krw <k...(a)att.bizzzzzzzzzzz> wrote: [...] > > Proprietary is enough to kill the deal. That's a major advantage of > HDLs; all you need is a text editor and you're good to go. Indeed > that's the one reason I won't use schematic entry for the data flow. > Data flow is extremely tedious in HDL but locking it into a tool > defeats a major purpose of HDLs. Even things like having to work around bugs in the various compilers makes for troubles in porting between tools. The Altera VHDL tool doesn't do the right thing when you assign Z to a signal. You have to use their tri() kludge. It is too long ago now so I'd have to paw through the source code but there was another thing that the Altera tools messed up on that was more major. Cypress used to make CPLDs but unfortunately, I designed one of them in so they decided to get out the business. Their development kit was fairly nice. It wasn't as huge as some others and seemed to be targeted at just doing what was needed to make VHDL get into an IC. It didn't have a lot of mysterious features to mess you up. [....] > > I misunderstood earlier. I was looking to switch schematic capture > tools a few weeks ago but we're pretty much locked into Allegro. I'm > pretty much stuck with Crapture. No point in going there, then. If I didn't have to interface with others, I would use the GEDA tools. They keep all the files in ASCII. This means that you can make your own tools to do funny things you may decide are needed like finding all the package types in the design etc.
From: krw on 11 Oct 2009 16:02 On Sun, 11 Oct 2009 09:59:46 -0700 (PDT), MooseFET <kensmith(a)rahul.net> wrote: >On Oct 10, 6:50�pm, "David L. Jones" <altz...(a)gmail.com> wrote: >> Jon Slaughter wrote: >> > "Jon Slaughter" <Jon_Slaugh...(a)Hotmail.com> wrote in message >> >news:haoqug$35j$1(a)news.eternal-september.org... >> >> Is there a development suite that is good but can target multiple >> >> fpga manufactures? I don't really want to install a bunch of 1GB+ >> >> light versions >> >> for each manufacture just to see which one is best. In fact I can't >> >> even get >> >> libero to run because it crashes on startup. >> >> >> Also, know of any links for DIY fpga programmers? �How hard is it to >> >> program? I figured that one just has to feed a bitstream into the >> >> fpga similar to how a pic is programmed(or most devices actually). >> >> Looking at the proASIC's makes me think it's a bit different but I >> >> haven't found any conclusive way to program them except by using >> >> DirectC or the STAPL Player. >> >> Since I'm experimenting with these different manufactures I don't >> >> want to have to buy a programmer for each chip. For as much as they >> >> cost I could get >> >> nanoboard with 10^10x the functionality. >> >> > BTW, I forgot to mention that I want to program in C++. Pure C++ but >> > SystemC or similar if necessary. >> >> Altium have a Xilinx (others on the way) development board and 12 month >> license of their full soft package for $399http://www.newark.com/altium/12-400-nb3000xn-01/nanoboard-3000xn-xili... >> >> For that you get C and C++, VHDL/Verilog, GUI like OpenBus, Real-time OS, >> and/or C to Hardware compiler for your development. Plus 32bit processors >> and other IP. No restrictions. >> >> Altium uses the Xilinx (or other) tools as the back-end, but it's all >> seamless, you don't notice you are using them. >> >> If you do want to experiment with different manufactuers, the Nanoboard NB2 >> is better, but it's $2K. >> >> They have a JTAG programmer for $150 for use on your own custom boards:http://www.newark.com/altium/12-403-dt01/usb-jtag-adapter/dp/10R0257 > >If your software can output a *.JAM file, you can make your own JTAG >cable for way under $150. > >Altera published the code for a JAM/STAPL player some years back. I >have a hacked version that I use all the time. The very nice thing >about it is that it can be made simple enough that you can write the >instructions for using it on a single page. The STAPL player is used for all their CPLDs as the means of in-system programming. They have the source on their site. All you have to do is add the low-level I/O routines for your hardware (e.g. PC printer port) and link it all together. It's so easy Actel swiped it. ;-)
From: krw on 11 Oct 2009 16:10 On Sun, 11 Oct 2009 10:11:34 -0700 (PDT), MooseFET <kensmith(a)rahul.net> wrote: >On Oct 11, 8:32�am, krw <k...(a)att.bizzzzzzzzzzz> wrote: >[...] >> >> Proprietary is enough to kill the deal. �That's a major advantage of >> HDLs; all you need is a text editor and you're good to go. �Indeed >> that's the one reason I won't use schematic entry for the data flow. >> Data flow is extremely tedious in HDL but locking it into a tool >> defeats a major purpose of HDLs. > >Even things like having to work around bugs in the various compilers >makes for troubles in porting between tools. The Altera VHDL tool >doesn't do the right thing when you assign Z to a signal. You have to >use their tri() kludge. Haven't quite gotten that far with Altera yet, but is this in internal 'Z' or inferring a 'Z' in an IOB? Tool bugs are certainly a problem, enough that I'd dump a manufacturer if they were too buggy. Times have changed, though. >It is too long ago now so I'd have to paw through the source code but >there was another thing that the Altera tools messed up on that was >more major. Things have gotten a *lot* better over the years. A decade ago I bought the Synplicity tools because Xilinx' were so messed up. I wouldn't today. >Cypress used to make CPLDs but unfortunately, I designed one of them >in so they decided to get out the business. Their development kit was >fairly nice. It wasn't as huge as some others and seemed to be >targeted at just doing what was needed to make VHDL get into an IC. >It didn't have a lot of mysterious features to mess you up. >[....] >> >> I misunderstood earlier. �I was looking to switch schematic capture >> tools a few weeks ago but we're pretty much locked into Allegro. �I'm >> pretty much stuck with Crapture. �No point in going there, then. > >If I didn't have to interface with others, I would use the GEDA >tools. They keep all the files in ASCII. This means that you can >make your own tools to do funny things you may decide are needed like >finding all the package types in the design etc. That's even easy with OrCAD Crapture. There are a lot of things like that are easy in Crapture. Unfortunately, other far more important things are impossible. :-(
From: MooseFET on 11 Oct 2009 16:23 On Oct 11, 1:02 pm, krw <k...(a)att.bizzzzzzzzzzz> wrote: > On Sun, 11 Oct 2009 09:59:46 -0700 (PDT), MooseFET > > > > <kensm...(a)rahul.net> wrote: > >On Oct 10, 6:50 pm, "David L. Jones" <altz...(a)gmail.com> wrote: > >> Jon Slaughter wrote: > >> > "Jon Slaughter" <Jon_Slaugh...(a)Hotmail.com> wrote in message > >> >news:haoqug$35j$1(a)news.eternal-september.org... > >> >> Is there a development suite that is good but can target multiple > >> >> fpga manufactures? I don't really want to install a bunch of 1GB+ > >> >> light versions > >> >> for each manufacture just to see which one is best. In fact I can't > >> >> even get > >> >> libero to run because it crashes on startup. > > >> >> Also, know of any links for DIY fpga programmers? How hard is it to > >> >> program? I figured that one just has to feed a bitstream into the > >> >> fpga similar to how a pic is programmed(or most devices actually). > >> >> Looking at the proASIC's makes me think it's a bit different but I > >> >> haven't found any conclusive way to program them except by using > >> >> DirectC or the STAPL Player. > >> >> Since I'm experimenting with these different manufactures I don't > >> >> want to have to buy a programmer for each chip. For as much as they > >> >> cost I could get > >> >> nanoboard with 10^10x the functionality. > > >> > BTW, I forgot to mention that I want to program in C++. Pure C++ but > >> > SystemC or similar if necessary. > > >> Altium have a Xilinx (others on the way) development board and 12 month > >> license of their full soft package for $399http://www.newark.com/altium/12-400-nb3000xn-01/nanoboard-3000xn-xili... > > >> For that you get C and C++, VHDL/Verilog, GUI like OpenBus, Real-time OS, > >> and/or C to Hardware compiler for your development. Plus 32bit processors > >> and other IP. No restrictions. > > >> Altium uses the Xilinx (or other) tools as the back-end, but it's all > >> seamless, you don't notice you are using them. > > >> If you do want to experiment with different manufactuers, the Nanoboard NB2 > >> is better, but it's $2K. > > >> They have a JTAG programmer for $150 for use on your own custom boards:http://www.newark.com/altium/12-403-dt01/usb-jtag-adapter/dp/10R0257 > > >If your software can output a *.JAM file, you can make your own JTAG > >cable for way under $150. > > >Altera published the code for a JAM/STAPL player some years back. I > >have a hacked version that I use all the time. The very nice thing > >about it is that it can be made simple enough that you can write the > >instructions for using it on a single page. > > The STAPL player is used for all their CPLDs as the means of in-system > programming. They have the source on their site. All you have to do > is add the low-level I/O routines for your hardware (e.g. PC printer > port) and link it all together. It's so easy Actel swiped it. ;-) My hacked version(s) will compile on a 16 bit MS-DOS machine with BC and work even for the large CPLDs and if compiled by gcc, it works on Linux. It flips the different code in and out with #ifdef statements.
From: MooseFET on 11 Oct 2009 16:27
On Oct 11, 1:10 pm, krw <k...(a)att.bizzzzzzzzzzz> wrote: > On Sun, 11 Oct 2009 10:11:34 -0700 (PDT), MooseFET > > <kensm...(a)rahul.net> wrote: > >On Oct 11, 8:32 am, krw <k...(a)att.bizzzzzzzzzzz> wrote: > >[...] > > >> Proprietary is enough to kill the deal. That's a major advantage of > >> HDLs; all you need is a text editor and you're good to go. Indeed > >> that's the one reason I won't use schematic entry for the data flow. > >> Data flow is extremely tedious in HDL but locking it into a tool > >> defeats a major purpose of HDLs. > > >Even things like having to work around bugs in the various compilers > >makes for troubles in porting between tools. The Altera VHDL tool > >doesn't do the right thing when you assign Z to a signal. You have to > >use their tri() kludge. > > Haven't quite gotten that far with Altera yet, but is this in internal > 'Z' or inferring a 'Z' in an IOB? The assignment of the 'Z' was some layers deep and the signal came out to a pin at the main level. > Tool bugs are certainly a problem, enough that I'd dump a manufacturer > if they were too buggy. Times have changed, though. At least, they need to publish a list of them and the work-arounds for them. > > >It is too long ago now so I'd have to paw through the source code but > >there was another thing that the Altera tools messed up on that was > >more major. > > Things have gotten a *lot* better over the years. A decade ago I > bought the Synplicity tools because Xilinx' were so messed up. I > wouldn't today. > > >Cypress used to make CPLDs but unfortunately, I designed one of them > >in so they decided to get out the business. Their development kit was > >fairly nice. It wasn't as huge as some others and seemed to be > >targeted at just doing what was needed to make VHDL get into an IC. > >It didn't have a lot of mysterious features to mess you up. > >[....] > > >> I misunderstood earlier. I was looking to switch schematic capture > >> tools a few weeks ago but we're pretty much locked into Allegro. I'm > >> pretty much stuck with Crapture. No point in going there, then. > > >If I didn't have to interface with others, I would use the GEDA > >tools. They keep all the files in ASCII. This means that you can > >make your own tools to do funny things you may decide are needed like > >finding all the package types in the design etc. > > That's even easy with OrCAD Crapture. There are a lot of things like > that are easy in Crapture. Unfortunately, other far more important > things are impossible. :-( I tried Crapture and after it munged the whole design, dropped it. I use the clunky old DOS Orcad. It does all the things needed. |