From: Chris on 12 Feb 2010 17:47 On Feb 12, 2:31 pm, Spehro Pefhany <speffS...(a)interlogDOTyou.knowwhat> wrote: > On Fri, 12 Feb 2010 14:14:04 -0800 (PST), Chris > > <christopher.man...(a)gmail.com> wrote: > >I need to make a PLL that slaves to a 24Hz square wave. The output of > >the loop would be a 60Hz square wave. Any CMOS level chips that would > >be good for this? I understand that I would need to divide by a > >decimal value of 2.5 for the loop. > > >Thanks, > >Chris Maness > > You could phase lock the 24Hz (movie frame rate?) to a 120Hz VCO > divided by 5, and divide the 120Hz by 2 to get 60Hz. That sounds better than trying to find a divide by 2.5. What chips would suggest to accomplish the divide by 5? Are there complete PLL chips that can be programed to divide by an odd number? Yes, it is a 1 pulse/frame to pilot tone converter. Similar to: http://www.webtfg.com/sync11.htm However, this is not primarily intended to have a record level sine wave out like "The Film Group" unit. I need a full 12V swing as an input to a perforated tape deck for the sync motor in the unit. Ideally I could have a lower level output to a digital recorder. This could in turn be amplified upon playback and fed back to the perforated tape deck. This would "resolve" the speed variations from the camera. When the film is played back referenced to a crystal, it would be synced to the film once the film has been scanned in to a frame accurate telecine. Thanks, Chris Maness
From: Vladimir Vassilevsky on 12 Feb 2010 18:01 Chris wrote: > I need to make a PLL that slaves to a 24Hz square wave. The output of > the loop would be a 60Hz square wave. Any CMOS level chips that would > be good for this? I understand that I would need to divide by a > decimal value of 2.5 for the loop. Use a PIC. Lock on 24 Hz by input capture, generate 60 Hz by output compare. Do all PLL logic in software. There will be a jitter of +/-1 timer clock, however this will be much better then suggested analog solutions. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com
From: Jim Thompson on 12 Feb 2010 18:07 On Fri, 12 Feb 2010 17:31:20 -0500, Spehro Pefhany <speffSNIP(a)interlogDOTyou.knowwhat> wrote: >On Fri, 12 Feb 2010 14:14:04 -0800 (PST), Chris ><christopher.maness(a)gmail.com> wrote: > >>I need to make a PLL that slaves to a 24Hz square wave. The output of >>the loop would be a 60Hz square wave. Any CMOS level chips that would >>be good for this? I understand that I would need to divide by a >>decimal value of 2.5 for the loop. >> >>Thanks, >>Chris Maness > >You could phase lock the 24Hz (movie frame rate?) to a 120Hz VCO >divided by 5, and divide the 120Hz by 2 to get 60Hz. Low frequency PLL's often present competing needs for fast lock and low jitter. So I've always been fond of this approach which "jerk" locks an "oscillator" created with a shift-register and a stable clock (dating back to 1983, where I had to extract data from a floppy whose orientation and physical acceleration were PITA).... http://analog-innovations.com/SED/FloppyDataExtractor.pdf ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
From: Chris on 12 Feb 2010 18:07 On Feb 12, 2:47 pm, Chris <christopher.man...(a)gmail.com> wrote: > On Feb 12, 2:31 pm, Spehro Pefhany <speffS...(a)interlogDOTyou.knowwhat> > wrote: > > > On Fri, 12 Feb 2010 14:14:04 -0800 (PST), Chris > > > <christopher.man...(a)gmail.com> wrote: > > >I need to make a PLL that slaves to a 24Hz square wave. The output of > > >the loop would be a 60Hz square wave. Any CMOS level chips that would > > >be good for this? I understand that I would need to divide by a > > >decimal value of 2.5 for the loop. > > > >Thanks, > > >Chris Maness > > > You could phase lock the 24Hz (movie frame rate?) to a 120Hz VCO > > divided by 5, and divide the 120Hz by 2 to get 60Hz. > > That sounds better than trying to find a divide by 2.5. What chips > would suggest to accomplish the divide by 5? Are there complete PLL > chips that can be programed to divide by an odd number? > > Yes, it is a 1 pulse/frame to pilot tone converter. Similar to: > > http://www.webtfg.com/sync11.htm > > However, this is not primarily intended to have a record level sine > wave out like "The Film Group" unit. I need a full 12V swing as an > input to a perforated tape deck for the sync motor in the unit. > Ideally I could have a lower level output to a digital recorder. This > could in turn be amplified upon playback and fed back to the > perforated tape deck. This would "resolve" the speed variations from > the camera. When the film is played back referenced to a crystal, it > would be synced to the film once the film has been scanned in to a > frame accurate telecine. > > Thanks, > Chris Maness Here is what I have so far: Looking at the CD4046b data sheet, it looks like the most straight forward design would be a Camera --> NE555 (to lengthen the 5ms pulse from the camera to 21ms for real square wave. I am not sure if this would be needed by the comparator)--> CD4046 (With an Divide by N CD4059 dividing by 5)-->CD4060 ( Signal Out from Q2 would be divide by 2). I already have a bunch of CD4060's from my last project. I also have some NE556's. Seems very easy. Thanks, Chris Maness
From: Fred Bartoli on 12 Feb 2010 18:21
Chris a �crit : > I need to make a PLL that slaves to a 24Hz square wave. The output of > the loop would be a 60Hz square wave. Any CMOS level chips that would > be good for this? I understand that I would need to divide by a > decimal value of 2.5 for the loop. > PLLs a those low frequencies are real slow if you need some 'jitter free' output. Square waves have only odd harmonics. You could square up your 24 Hz, apply it to a narrow 120Hz BPF, then divide by two. -- Thanks, Fred. |