From: Jim Thompson on
On Sat, 13 Feb 2010 16:37:53 +0100, Fred Bartoli <" "> wrote:

>Chris a �crit :
>> On Feb 12, 3:21 pm, Fred Bartoli <" "> wrote:
>>> Chris a �crit :
>>>
>>>> I need to make a PLL that slaves to a 24Hz square wave. The output of
>>>> the loop would be a 60Hz square wave. Any CMOS level chips that would
>>>> be good for this? I understand that I would need to divide by a
>>>> decimal value of 2.5 for the loop.
>>> PLLs a those low frequencies are real slow if you need some 'jitter
>>> free' output.
>>>
>>> Square waves have only odd harmonics. You could square up your 24 Hz,
>>> apply it to a narrow 120Hz BPF, then divide by two.
>>>
>>> --
>>> Thanks,
>>> Fred.
>>
>> The 24Hz is square. What would I use for a BP filter at such a LF
>> without having a very large inductor?
>>
>> Chris
>
>Make that an active filter. Only Rs and Cs, and at that low frequency,
>any opamp will nicely do.

Caution: At such low frequencies, capacitor dissipation can play a
critical role in screwing up active filter performance.

Clear back in the early '70's, while designing telephone filters I
discovered you can negate dissipation factor by making your
integrators such...

http://analog-innovations.com/SED/StateVariableFilter(P+1).pdf

Paste rather than just click, Agent doesn't like parentheses in a URL.
I don't know about the behavior of other readers.

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
From: Vladimir Vassilevsky on


Martin Riddle wrote:

> "Vladimir Vassilevsky" <nospam(a)nowhere.com> wrote in message
> news:UqOdnWHSjYZDQOjWnZ2dnUVZ_gGdnZ2d(a)giganews.com...
>
>>
>>Chris wrote:
>>
>>
>>>I need to make a PLL that slaves to a 24Hz square wave. The output
>>>of
>>>the loop would be a 60Hz square wave. Any CMOS level chips that
>>>would
>>>be good for this? I understand that I would need to divide by a
>>>decimal value of 2.5 for the loop.
>>
>>Use a PIC.
>>
>>Lock on 24 Hz by input capture, generate 60 Hz by output compare. Do
>>all PLL logic in software. There will be a jitter of +/-1 timer clock,
>>however this will be much better then suggested analog solutions.
>>

> Hi Vladimir, Is there good reading references for doing a software PLL
> anywhere.
> So far in my casual searches, I've found very little on a software
> implementation.

If you go to a local univercity library, there is a whole shelf of books
on the matter of digital PLLs and phase synchronization. They all talk
about essentially the same things and they seem to be retellings of each
other. I really can't recommend a particular one.

As for the OP's problem, it is VERY simple.

1. Estimate the phase of 24 Hz from input capture readings.
2. Multiply the phase by 2.5 modulo period.
3. Find the difference between this phase and the phase of 60 Hz.
4. Apply this difference to the frequency of 60 Hz through a filter.

Here we go. Takes 20 lines of code or so.


Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
http://www.abvolt.com







From: MooseFET on
On Feb 13, 8:20 am, Vladimir Vassilevsky <nos...(a)nowhere.com> wrote:
> MooseFET wrote:
> > On Feb 12, 3:01 pm, Vladimir Vassilevsky <nos...(a)nowhere.com> wrote:
>
> >>Chris wrote:
>
> >>>I need to make a PLL that slaves to a 24Hz square wave.  The output of
> >>>the loop would be a 60Hz square wave.  Any CMOS level chips that would
> >>>be good for this?  I understand that I would need to divide by a
> >>>decimal value of 2.5 for the loop.
>
> >>Use a PIC.
>
> > No, the 8051 is the right processor for this.
>
> Personally I despise PICs. However PIC became a generic word for any
> small microcontroller. Once a customer asked me if I work with PIC
> controllers made by AVR company.

The PIC isn't all that bad. It is just a little weirder than it
needed
to be. I think part of it is because they did'nt think through the
step
to the next larger size.

When they designed the assembler for it, they compounded the
weirdness.
Given what it can do, a assembler that took expressions like:

A += Variable
Variable += A

would have made it easier to read.

>
> Vladimir Vassilevsky
> DSP and Mixed Signal Design Consultanthttp://www.abvolt.com

From: Chris on
On Feb 13, 10:14 am, MooseFET <kensm...(a)rahul.net> wrote:
> On Feb 13, 8:20 am, Vladimir Vassilevsky <nos...(a)nowhere.com> wrote:
>
>
>
> > MooseFET wrote:
> > > On Feb 12, 3:01 pm, Vladimir Vassilevsky <nos...(a)nowhere.com> wrote:
>
> > >>Chris wrote:
>
> > >>>I need to make a PLL that slaves to a 24Hz square wave.  The output of
> > >>>the loop would be a 60Hz square wave.  Any CMOS level chips that would
> > >>>be good for this?  I understand that I would need to divide by a
> > >>>decimal value of 2.5 for the loop.
>
> > >>Use a PIC.
>
> > > No, the 8051 is the right processor for this.
>
> > Personally I despise PICs. However PIC became a generic word for any
> > small microcontroller. Once a customer asked me if I work with PIC
> > controllers made by AVR company.
>
> The PIC isn't all that bad.  It is just a little weirder than it
> needed
> to be.  I think part of it is because they did'nt think through the
> step
> to the next larger size.
>
> When they designed the assembler for it, they compounded the
> weirdness.
> Given what it can do, a assembler that took expressions like:
>
>    A += Variable
>    Variable += A
>
> would have made it easier to read.
>
>
>
> > Vladimir Vassilevsky
> > DSP and Mixed Signal Design Consultanthttp://www.abvolt.com

Well the reason I am straying away from the MCU idea is that I really
want to just finish the project. I am doing it in my spare time. If
I could program it in about the same amount of time it would take me
to put together the aforementioned list of parts, then I am all ears.
However, never having messed around with programing a chip before, I
am thinking this could take another couple of dozen hours to
accomplish the task (factoring in a learning curve).

However, if you guys think that the signal from my design would be too
jittery to be useful than I guess I don't have a choice, but to take
the MCU route.

Thanks,
Chris
From: whit3rd on
On Feb 12, 2:44 pm, John Larkin
<jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote:
> On Fri, 12 Feb 2010 14:14:04 -0800 (PST), Chris
>
> <christopher.man...(a)gmail.com> wrote:
> >I need to make a PLL that slaves to a 24Hz square wave.  The output of
> >the loop would be a 60Hz square wave.

> CD or HC 4046, with a slow loop. Divide 24 by 2 and divide 60 by five
> and lock at 12 Hz.

Right chip, but the best strategy is to lock a high frequency to a
multiple
of the 24 Hz, NOT to lock at 12 Hz. The loop filter works better at
the highest frequency, and the noise pickup would improve if
you went higher than that. Then, divide 240 by 4 to get the 60 Hz,
and by five then by two to get the 24 Hz for the phase comparison.

The 'divide by two' on each branch guarantees accurate 50% duty cycle,
many
counters have asymmetric outputs.