24Hz to 60Hz PLL?
in [Design]
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From: Chris on 12 Feb 2010 17:14 I need to make a PLL that slaves to a 24Hz square wave. The output of the loop would be a 60Hz square wave. Any CMOS level chips that would be good for this? I understand that I would need to divide by a decimal value of 2.5 for the loop. Thanks, Chris Maness
From: Spehro Pefhany on 12 Feb 2010 17:31 On Fri, 12 Feb 2010 14:14:04 -0800 (PST), Chris <christopher.maness(a)gmail.com> wrote: >I need to make a PLL that slaves to a 24Hz square wave. The output of >the loop would be a 60Hz square wave. Any CMOS level chips that would >be good for this? I understand that I would need to divide by a >decimal value of 2.5 for the loop. > >Thanks, >Chris Maness You could phase lock the 24Hz (movie frame rate?) to a 120Hz VCO divided by 5, and divide the 120Hz by 2 to get 60Hz.
From: Jon Slaughter on 12 Feb 2010 17:38 Chris wrote: > I need to make a PLL that slaves to a 24Hz square wave. The output of > the loop would be a 60Hz square wave. Any CMOS level chips that would > be good for this? I understand that I would need to divide by a > decimal value of 2.5 for the loop. > > Thanks, > Chris Maness The lcm of 24 and 60 is 120. This suggests the best you'll get is 5/2 if looking for exactness. i.e., 5*24 = 120 = 2*60
From: tm on 12 Feb 2010 17:48 "Spehro Pefhany" <speffSNIP(a)interlogDOTyou.knowwhat> wrote in message news:eilbn5pphbtca65k6aqjge9ddtenoumf1l(a)4ax.com... > On Fri, 12 Feb 2010 14:14:04 -0800 (PST), Chris > <christopher.maness(a)gmail.com> wrote: > >>I need to make a PLL that slaves to a 24Hz square wave. The output of >>the loop would be a 60Hz square wave. Any CMOS level chips that would >>be good for this? I understand that I would need to divide by a >>decimal value of 2.5 for the loop. >> >>Thanks, >>Chris Maness > > You could phase lock the 24Hz (movie frame rate?) to a 120Hz VCO > divided by 5, and divide the 120Hz by 2 to get 60Hz. > Or divide the 24 Hz by 2 and lock a 60 Hz PLL to the 12 Hz by a divide by 5. Same thing but your soln. has higher frequencies so smaller caps.
From: John Larkin on 12 Feb 2010 17:44
On Fri, 12 Feb 2010 14:14:04 -0800 (PST), Chris <christopher.maness(a)gmail.com> wrote: >I need to make a PLL that slaves to a 24Hz square wave. The output of >the loop would be a 60Hz square wave. Any CMOS level chips that would >be good for this? I understand that I would need to divide by a >decimal value of 2.5 for the loop. > >Thanks, >Chris Maness CD or HC 4046, with a slow loop. Divide 24 by 2 and divide 60 by five and lock at 12 Hz. There's some old IC (7490?) that will do both divides for you. John |