24Hz to 60Hz PLL?
in [Design]
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From: John Larkin on 19 Feb 2010 01:37 On Thu, 18 Feb 2010 18:54:22 -0800 (PST), MooseFET <kensmith(a)rahul.net> wrote: >On Feb 18, 9:31�am, John Larkin ><jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: >> On Thu, 18 Feb 2010 12:23:49 -0500, Phil Hobbs >> >> >> >> <pcdhSpamMeSensel...(a)electrooptical.net> wrote: >> >On 2/18/2010 10:51 AM, Jim Thompson wrote: >> >> On Thu, 18 Feb 2010 10:22:36 -0500, "Michael A. Terrell" >> >> <mike.terr...(a)earthlink.net> wrote: >> >> >>> Jim Thompson wrote: >> >> >>>> Michael A. Terrell wrote: >> >> >>>>> � Microdyne was still using a second source version of the MC4044 ten >> >>>>> years ago. We were having trouble getting a good supply, but i couldn't >> >>>>> convince them to switch to the 4046. �The 'Engineer' responsible for >> >>>>> supporting older designs insisted it couldn't be used, because it was >> >>>>> too slow. �He wouldn't look at the 20 year old drawings, and wouldn't >> >>>>> admit that the PLL only had to lock to a 100 KHz reference. >> >> >>>> I have no idea who made the 4046 copy originally, but they blundered >> >>>> several features :-( >> >> >>> � Wasn't that designed by, or for RCA in the early '70s? �I know >> >>> someone who worked for RCA at that time, but he was at the fab. >> >> >> I think you're right, Michael. �"CD"4046 seems to be the very first >> >> moniker. >> >> >> I've not actually tried the current 74HC4046 version but, were it done >> >> right, with today's processing, it could be a screamer. >> >> >> � � � � � � � � � � � � � � � � � � � � ...Jim Thompson >> >> >The PD is okay, though it still has the deadband, but they screwed up >> >the VCO--it craps out at low voltage. �No more 100:1 or 1000:1 VCO ranges. >> >> >Cheers >> >> >Phil Hobbs >> >> The HC4046s I've used have about a 7 ns deadband. Annoying. >> >> We've done some nice phase/frequency detectors in FPGAs. Rather than >> try to make the outputs do charge pumping, we bring out separate >> hard-CMOS UP and DOWN pulses, and use outboard schottky >> diodes+resistors into the analog stuff. The whole charge pump concept >> is a tad flakey, in my opinion. > >If you are going for low noise, you really want the added stage of >logic >clean up that you get by doing the converting to analog outside the >chip. > >> >> I also like single flipflop bang-bang detection for narrowband loops. >> No deadband, and loop gain is infinite! > >It really isn't infinite. On the 74HC74 it is less than infinite >because >the set up time to cause the output to toggle is longer than the setup >to cause it to be the same. I don't recall how big the effect is but >it >is a small nonzero value. Perhaps with a different flip-flop it is >greater >than infinity and so it averages out. The bang-bang loops that I've done were EclipsLite ECL. The EL51 flop seems to have a little setup/hold hysteresis, roughly 1 picosecond, but that doesn't bother a relatively narrowbend loop, like locking a VCXO to some external reference. It's hard to beat a differential-input flipflop bang-bang detector when you want to hold a couple of picoseconds absolute timing longterm. Any jitter in the reference or the VCO smears out the transfer function of the bangbang pd, making it effectively finite gain. I do the loop math based on some assumption of some jitter. John
From: Ban on 19 Feb 2010 02:01 Jim Thompson wrote: >>>>> Jim Thompson wrote: >> The HC4046s I've used have about a 7 ns deadband. Annoying. >> >> We've done some nice phase/frequency detectors in FPGAs. Rather than >> try to make the outputs do charge pumping, we bring out separate >> hard-CMOS UP and DOWN pulses, and use outboard schottky >> diodes+resistors into the analog stuff. The whole charge pump concept >> is a tad flakey, in my opinion. >> >> I also like single flipflop bang-bang detection for narrowband loops. >> No deadband, and loop gain is infinite! >> >> John >> > > If you implement the "charge pump" current mirrors on-chip, as I > regularly do in my ASIC designs, it becomes a non-issue. > It has been done already many years ago http://ics.nxp.com/products/hc/datasheet/74hc7046a.pdf ciao Ban
From: MooseFET on 19 Feb 2010 09:44 On Feb 18, 10:37 pm, John Larkin <jjSNIPlar...(a)highTHISlandtechnology.com> wrote: > On Thu, 18 Feb 2010 18:54:22 -0800 (PST), MooseFET > > > > <kensm...(a)rahul.net> wrote: > >On Feb 18, 9:31 am, John Larkin > ><jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: > >> On Thu, 18 Feb 2010 12:23:49 -0500, Phil Hobbs > > >> <pcdhSpamMeSensel...(a)electrooptical.net> wrote: > >> >On 2/18/2010 10:51 AM, Jim Thompson wrote: > >> >> On Thu, 18 Feb 2010 10:22:36 -0500, "Michael A. Terrell" > >> >> <mike.terr...(a)earthlink.net> wrote: > > >> >>> Jim Thompson wrote: > > >> >>>> Michael A. Terrell wrote: > > >> >>>>> Microdyne was still using a second source version of the MC4044 ten > >> >>>>> years ago. We were having trouble getting a good supply, but i couldn't > >> >>>>> convince them to switch to the 4046. The 'Engineer' responsible for > >> >>>>> supporting older designs insisted it couldn't be used, because it was > >> >>>>> too slow. He wouldn't look at the 20 year old drawings, and wouldn't > >> >>>>> admit that the PLL only had to lock to a 100 KHz reference. > > >> >>>> I have no idea who made the 4046 copy originally, but they blundered > >> >>>> several features :-( > > >> >>> Wasn't that designed by, or for RCA in the early '70s? I know > >> >>> someone who worked for RCA at that time, but he was at the fab. > > >> >> I think you're right, Michael. "CD"4046 seems to be the very first > >> >> moniker. > > >> >> I've not actually tried the current 74HC4046 version but, were it done > >> >> right, with today's processing, it could be a screamer. > > >> >> ...Jim Thompson > > >> >The PD is okay, though it still has the deadband, but they screwed up > >> >the VCO--it craps out at low voltage. No more 100:1 or 1000:1 VCO ranges. > > >> >Cheers > > >> >Phil Hobbs > > >> The HC4046s I've used have about a 7 ns deadband. Annoying. > > >> We've done some nice phase/frequency detectors in FPGAs. Rather than > >> try to make the outputs do charge pumping, we bring out separate > >> hard-CMOS UP and DOWN pulses, and use outboard schottky > >> diodes+resistors into the analog stuff. The whole charge pump concept > >> is a tad flakey, in my opinion. > > >If you are going for low noise, you really want the added stage of > >logic > >clean up that you get by doing the converting to analog outside the > >chip. > > >> I also like single flipflop bang-bang detection for narrowband loops. > >> No deadband, and loop gain is infinite! > > >It really isn't infinite. On the 74HC74 it is less than infinite > >because > >the set up time to cause the output to toggle is longer than the setup > >to cause it to be the same. I don't recall how big the effect is but > >it > >is a small nonzero value. Perhaps with a different flip-flop it is > >greater > >than infinity and so it averages out. > > The bang-bang loops that I've done were EclipsLite ECL. The EL51 flop > seems to have a little setup/hold hysteresis, roughly 1 picosecond, > but that doesn't bother a relatively narrowbend loop, like locking a > VCXO to some external reference. It's hard to beat a > differential-input flipflop bang-bang detector when you want to hold a > couple of picoseconds absolute timing longterm. > > Any jitter in the reference or the VCO smears out the transfer > function of the bangbang pd, making it effectively finite gain. I do > the loop math based on some assumption of some jitter. Yes, you have to do that partly because doing math with infinite values is a lot harder. In all digital stuff, I have used the change in state of the flip-flop to provide the real part to make the loop stable. Basically what I did was: INC/DEC ! ----------------! ----- ! ! ----- !AND>----Gain one Signal-----!D Q!----+--+----!D Q! --! --!> ! --!> ! ! ! ----- ! ! Q/!-- ! ! NCO/M-- Clock The Number Controlled Oscillator is just a divide by N counter where the few bottom bits of N are controlled by the upper bits of another counter that is hooked to the INC/DEC control. The "Gain One" signal causes the NCO to increment by 2 on the next clock cycle. This some of the phase lag making the system stable. Without it the output wobbles either side of the correct value. instead of quickly and randomly jittering. The wobble makes a lot of low frequency noise in the output.
From: Jim Thompson on 19 Feb 2010 09:51 On Fri, 19 Feb 2010 08:01:31 +0100, "Ban" <bansuri(a)web.de> wrote: >Jim Thompson wrote: >>>>>> Jim Thompson wrote: >>> The HC4046s I've used have about a 7 ns deadband. Annoying. >>> >>> We've done some nice phase/frequency detectors in FPGAs. Rather than >>> try to make the outputs do charge pumping, we bring out separate >>> hard-CMOS UP and DOWN pulses, and use outboard schottky >>> diodes+resistors into the analog stuff. The whole charge pump concept >>> is a tad flakey, in my opinion. >>> >>> I also like single flipflop bang-bang detection for narrowband loops. >>> No deadband, and loop gain is infinite! >>> >>> John >>> >> >> If you implement the "charge pump" current mirrors on-chip, as I >> regularly do in my ASIC designs, it becomes a non-issue. >> > >It has been done already many years ago >http://ics.nxp.com/products/hc/datasheet/74hc7046a.pdf >ciao Ban > Of course "It has been done already many years ago". I invented dirt. Also much of modern PLL technology. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
From: Michael A. Terrell on 19 Feb 2010 20:45
Jim Thompson wrote: > > On Fri, 19 Feb 2010 08:01:31 +0100, "Ban" <bansuri(a)web.de> wrote: > > >Jim Thompson wrote: > >>>>>> Jim Thompson wrote: > >>> The HC4046s I've used have about a 7 ns deadband. Annoying. > >>> > >>> We've done some nice phase/frequency detectors in FPGAs. Rather than > >>> try to make the outputs do charge pumping, we bring out separate > >>> hard-CMOS UP and DOWN pulses, and use outboard schottky > >>> diodes+resistors into the analog stuff. The whole charge pump concept > >>> is a tad flakey, in my opinion. > >>> > >>> I also like single flipflop bang-bang detection for narrowband loops. > >>> No deadband, and loop gain is infinite! > >>> > >>> John > >>> > >> > >> If you implement the "charge pump" current mirrors on-chip, as I > >> regularly do in my ASIC designs, it becomes a non-issue. > >> > > > >It has been done already many years ago > >http://ics.nxp.com/products/hc/datasheet/74hc7046a.pdf > >ciao Ban > > > > Of course "It has been done already many years ago". I invented dirt. > Also much of modern PLL technology. Come on, Jim. We all know that the dirt was just a byproduct of you doing your designs with chisels, on stone tablets. ;-) -- Greed is the root of all eBay. |