Design

Simple SD Interface
Hi folks. Maybe I'll try this here since the electronics.basics newsgroup is fairly inactive these days apparently. Anyhow, I want to do something fairly simple, but I want the advice of someone who actually knows more about this stuff to make sure I don't do something wrong that I'm not taking into account. ... 8 Jan 2010 21:47

Global warming?
No damn way! It's 21 degrees in Ocala right now and expected to get colder. They are forecasting some snow, and this may become one of the longest cold spells on record with another cold front headed this way. -- Greed is the root of all eBay. ... 22 Feb 2010 00:55

arbitray inpedance vs frequency spice model
Is there a SPICE model that allows to set to define a two pin device to have arbitraty impedance vs frequency? I measured the impedance of a device that has a odd impedance. I'd like to model that without making a lumped circuit with R,L,C. Any of you guys know of such a thing or dealt with this issue in the... 8 Jan 2010 12:48

Art of Electronics, 3rd edition ?
Last I heard, it was targeted for early 2010. Any recent news? Bob ... 10 Jan 2010 19:41

MAx232 unused inputs
Here's a nice simple one for you.... If my design has 5 CMOS serial ports, and I use something like 3 x MAX232, which have 2 drivers/receivers on each chip, then what should I do with the unused inputs/outputs on the 3rd chip? Should I leave the CMOS inputs floating or tie them up or down? What about the RS232 i... 8 Jan 2010 23:57

mc33063 current limiting
How does the current limiting work in the MC33063. The datasheet doesn't explain the actual mechanism. http://www.onsemi.com/pub_link/Collateral/MC34063A-D.PDF Does it discharge the timing cap when it detects overcurrent, which would restart the oscillator, or does it let the oscillator keep running but at a ... 6 Jan 2010 19:56

Delta Sigma ADC and clock noise
Hello all, Could you suggest a reading about the effects of clock jitter in delta-sigma ADCs ? How does it affect SNR, THD, IMD, SFDR ? For some reason, this practical aspect is not mentioned in the ADC datasheets and manuals; the typical phrase is "good quality low jitter clock should be provided", whatever... 7 Jan 2010 02:30

Multiple current mirrors
Gentlemen, I'm working on the concept for an instrument that needs to take a number of current sources (photodiodes, 44 off) and find the ratio between each of the 43 currents with the 44th (the largest). The currents are in the range of, say, 100 nA to 10 uA. Electronics design is a bit out of my skill set bu... 7 Jan 2010 20:20

Battery Charger Design
Dear group, I am trying to design a battery charger for this battery: http://uk.farnell.com/varta/55615605940/battery-pcb-mount-6v-5-v150h/dp/863981 I'm familiar with voltage regulators and current limiting etc. but am unsure what parameters to use? If I simply provide 6v limited to 70mA will this work? ... 12 Jan 2010 21:53

Oldschool TTL design question
I've scored a huge bunch of 74LS series logic off Ebay, and since I'd like to learn more about digital design I'm thinking of building a classic digital clock circuit out of the logic. The assortment only contains 74LS93 4 bit counters, and I hope to use AND gates to decode the outputs to provide reset and clo... 6 Jan 2010 11:58