FPGA
in [Hardware]
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Place and Route Hello, I am using Xilinx ISE 11.1, and I need to place some components in certain areas of the FPGA. I have never done manual PaR, so here are a few questions: 1) Do I need to manually place each and every net? 2) Is it possible to just place 'blocks' of each component in a general area of CLB on the device,... 4 Mar 2010 16:55
Drigmorn3 - Spartan-6 Board Update If you were all wondering why we have not had stock recently on this board we took some feedback and then took the opportunity to shoehorn some more features into this board. We have improved the LVDS features of the board, and added the following 20 more I/O on an IDC 40 way DS1306 RTC with battery hol... 26 Feb 2010 14:11
Call for Papers: The 2010 International Conference of Wireless Networks (ICWN 2010) CFP: The 2010 International Conference of Wireless Networks (ICWN 2010) From: IAENG - International Association of Engineers http://www.iaeng.org/WCE2010/ICWN2010.html Draft Paper Submission Deadline: 6 March, 2010 Camera-Ready papers & Registration Deadline: 31 March, 2010 WCE 2010: London, U.K., 30 June -2 Ju... 26 Feb 2010 05:13
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Frustration with Vendors! Sometimes vendors act like they don't want you to use their parts. I am looking for rise/fall time information on an FPGA output in one voltage mode LVCMOS33 and the various drive and slew rate options. This doesn't sound like a difficult thing to ask for, but it seems to be a very difficult thing to get. I recal... 2 Mar 2010 05:40
Altera data sheets. <big snip!> BTW, you can blame all of this on the community standardizing on a proprietary document format instead of open source. There seem to be open source tools for PDF files now, but it has taken a long time and most people don't know about them. Rick PDF is now a 'proper' standard: ISO 320... 27 Feb 2010 09:53
Xilinx XPS crash on Linux Hi, I want to test Microblaze processor with Xilinx tools. After creating a MicroBlaze project with the Xilinx Platform Studio, the application crashes. Same crash happens when I open this project. I use Mandriva 2010 32b and Xilinx support doesn' t help me since I have an unsupported OS. I get this mes... 25 Feb 2010 15:56
Scrubbing in Virtex-4 Hi all, Iam experimenting with Scrubbing in Xilinx Virtex-4 devices. According to XAPP1088, pag.18: "For scrubbing operations, there are special considerations for designs utilizing distributed RAMs and SRL16s. When a LUT is configured as either SRL16 or distributed RAM (LUT RAM), scrubbing can corrupt the conte... 25 Feb 2010 10:14
Scrubbing in Virtex-4 Hi all, I am experimenting with Scrubbing in Xilinx Virtex-4 devices. According to XAPP1088, pag.18: "For scrubbing operations, there are special considerations for designs utilizing distributed RAMs and SRL16s. When a LUT is configured as either SRL16 or distributed RAM (LUT RAM), scrubbing can corrupt the cont... 25 Feb 2010 08:00
EDK spi ip core 1. If I look at the spartan 3a 3400 dsp evaluation board schematic there is as SPI EEPROM. Looking at the part number it is a part number for a FLASH by Microchip(M25P16-VMW6G). 2. Looking at this example xspi_stm_flash_example.c though he mentions the same part number M25P16. Then why the name SPI EEPROM?????... 25 Feb 2010 23:48 |