FPGA
in [Hardware]
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how to use the design results of the vhdl code for a program in C code hello, i need help. i work over an algo in C langage that verifies a design described in VHDL for it, i want take all informations from my vhdl code for use them in my programme in C and i don't know how. ... 15 Mar 2010 06:46
ERROR: overlaps section... >charlie78 schrieb: Hi all, XPS 10.1 returns me these errors... /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: region ilmb_cntlr_dlmb_cntlr is full (TestApp_Memory/executable.elf section .text) ... 15 Mar 2010 05:41
Nu Horizons Spartan 3A DSP board I am trying to send data from the FPGA to the ethernet transeiver on the Nu Horizons Spartan 3A DSP board. There is an on-board Micrel KSZ8041NL transceiver, and Nu Horizons has provided a wrapper (.bit file) to talk to the transceiver. I have downloaded it to the board, but don't know how to use the wrapper as t... 18 Mar 2010 11:39
usb device driver for ISP1362(in windows xp) hello everyone, My project require me to write the driver for usb device(isp1362 chip). Do anyone knows how to write the vendor request and usb device request for this chip? i had read from ISP1362 datasheet (ms45) but i cant understand it. anyOne has any source or example as my refence? Thanks, Summer ... 18 Mar 2010 15:28
When do you pin out? Hey y'all -- Lately my company's been poking around at our overall design flow, trying to work out how to make things happen in better, more logical fashions. And one of the things that comes to mind is the pinning of FPGAs, i.e. determining which signal's going to go where. Traditionally around here, we've al... 12 Mar 2010 13:53
how can i add memory Hi all; may someone explain to me how to add memory to store my microBlaze program if my system is out of memory? thank you in advance --------------------------------------- Posted through http://www.FPGARelated.com ... 15 Mar 2010 08:57
Question Rdging xilinx chipscope pro triggering hello all , I have triggered the chipscope on some error signal and is getting triggered on error.But i am unable to analyse the cause of the error. Is there any way we can sample the previous 20 or 50 samples before trigger so that i can see which are the signals causing the error ? Thanks in advance. ... 17 Mar 2010 04:39
solutions manual to An Introduction to Modern Astrophysics (2nd Ed., Bradley W. Carroll & Dale A. Ostlie) I have the comprehensive instructor's solutions manuals in an electronic format for the following textbooks. They include full solutions to all the problems in the text, but please DO NOT POST HERE, instead send me email including title and edition of the solutions manual u need. NOTE: This service is NOT free My... 12 Mar 2010 00:39
Comparing FPGA with ASIC implementations Hi all, I just wanna get some feedback if I understood this correctly: Althoug there is something out called gate-equivalent, it essentially does not make sense to compare FPGA with ASIC implementations. The reason is that ASICs actually require one gate for each logical operation in a logical expression. Fo... 13 Mar 2010 16:28
fastest multiplier for dsps The fastest multiplier in fpga for dsps are designed using a method using Vedic mathematics technique.. To view tha technology go the iete journals website.. http://jr.ietejournals.org/downloadpdf.asp?issn=0377-2063;year=2009;volume=55;issue=6;spage=282;epage=286;aulast=Pushpangadan;type=2 http://jr.ietejournals.... 11 Mar 2010 11:07 |